ADC32RF44 Datasheet, PDF(44/134 Page) Texas Instruments – Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

ADC32RF44 Datasheet, PDF (44/134 Pages) Texas Instruments – Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter

◁

ADC32RF44

SBAS809 â FEBRUARY 2017

DWELL Time

THHH

THHL

www.ti.com

BLKPKDET

Figure 104. Peak Power Detector Timing Diagram

Table 8 shows the register configurations required to set up the absolute peak power detector. The detector

operates in the fS / 8 clock domain; one peak sample is calculated over eight actual samples.

The automatic gain control (AGC) modes can be configured separately for channel A (54xxh) and channel B

(5Cxxh), although some registers are common in 54xxh (such as the GPIO pin selection).

PKDET EN

BLKPKDET

BLKTHHH,

BLKTHHL,

BLKTHLH,

BLKTHLL

DWELL

OUTSEL

GPIO[4:1]

IODIR

RESET AGC

Table 8. Registers Required for the Peak Power Detector

ADDRESS

5400, 5C00h

5401h, 5402h,

5403h, 5C01h,

5C02h, 5C03h

5407h, 5408h,

5409h, 540Ah,

5C07h, 5C08h,

5C09h, 5C0Ah

540Bh, 540Ch,

5C0Bh, 5C0Ch

5432h, 5433h,

5434h, 5435h

5437h

542Bh, 5C2Bh

Enables peak detector

DESCRIPTION

Sets the block length N of number of samples (S`). Number of actual ADC samples is 8X this

value: N is 17 bits: 1 to 216.

Sets the different thresholds for the hysteresis function values from 0 to 256 (where 256 is

equivalent to the peak amplitude).

For example: if BLKTHHH is to â2 dBFS from peak, 10(â2 / 20) Ã 256 = 203, then set 5407h and

5C07h = CBh.

When the computed block peak crosses the upper thresholds BLKTHHH or BLKTHLH, the peak

detector output flags are set. In order to be reset, the computed block peak must remain

continuously lower than the lower threshold (BLKTHHL or BLKTHLL) for the period specified by

the DWELL value. This threshold is 16 bits and is specified in terms of fS / 8 clock cycles.

Connects the BLKPKDETH, BLKPKDETL alarms to the GPIO pins; common register.

Selects the direction for the four GPIO pins; common register.

After configuration, reset the AGC module to start operation.

Submit Documentation Feedback

Product Folder Links: ADC32RF44

▷