ADC32RF44 Datasheet, PDF (120/134 Pages) Texas Instruments – Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter

ADC32RF44
SBAS809 – FEBRUARY 2017
www.ti.com
10.1.5 Using DC Coupling in the ADC32RF44
The ADC32RF44 can be used in dc-coupling applications. However, the following points must be considered
when designing the system:
1. Ensure that the correct common-mode voltage is used at the ADC analog inputs.
The analog inputs are internally self-biased to V_CM through approximately a 33-Ω resistor. The internal
biasing resistors also function as a termination resistor. However, if a different termination is required, the
external resistor R_TERM can be differentially placed between the analog inputs, as shown in Figure 235. The
amplifier V_OCM pin is recommended to be driven from the CM pin of the ADC to help the amplifier output
common-mode voltage track the required common-mode voltage of the ADC.
ADC32RF45
OUTP
RS / 2
Driving Amp
RS / 2
OUTM
VOCM
Low-Pass
Filter
INxP
RTERM
INxM
CM
ADC
Digital
RDC/2⁽²⁾
RDC / 2 ^RCM(1)
VCM
Offset
Corrector
Interleaving
Engine
DDC
Block
JESD
204B
Interface
Digital
Ouput
Copyright © 2016, Texas Instruments Incorporated
Set the INCR CM IMPEDANCE bit to increase the RCM from 0 Ω to > 5000 Ω.
R_DC is approximately 65 Ω.
Figure 235. The ADC32RF44 in a DC-Coupling Application
2. Ensure that the correct SPI settings are written to the ADC.
As shown in Figure 236, the ADC32RF44 has a digital block that estimates and corrects the offset mismatch
among four interleaving ADC cores for a given channel.
Offset Corrector
Data In
Freeze
Correction
Estimator
++
±
Disable
Correction
Data Out
Figure 236. Offset Corrector in the ADC32RF44
The offset corrector block nullifies dc, f_S / 8, f_S / 4, 3 f_S / 8, and f_S / 2. The resulting spectrum becomes free
from static spurs at these frequencies. The corrector continuously processes the data coming from the
interleaving ADC cores and cannot distinguish if the tone at these frequencies is part of signal or if the tone
originated from a mismatch among the interleaving ADC cores. Thus, in applications where the signal is
present at these frequencies, the offset corrector block can be bypassed.
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