MSP430F249-EP_14 Datasheet, PDF (6/82 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F249-EP
MIXED SIGNAL MICROCONTROLLER
2008
TERMINAL
NAME
NO.
P4.2/TB2
38
P4.3/TB3
39
P4.4/TB4
40
P4.5/TB5
41
P4.6/TB6
42
P4.7/TBCLK
43
P5.0/UCB1STE/
UCA1CLK
44
P5.1/UCB1SIMO/
UCB1SDA
45
P5.2/UCB1SOMI/
UCB1SCL
46
P5.3/UCB1CLK/
UCA1STE
47
P5.4/MCLK
48
P5.5/SMCLK
49
P5.6/ACLK
50
P5.7/TBOUTH/
SVSOUT
51
P6.0/A0
59
P6.1/A1
60
P6.2/A2
61
P6.3/A3
2
P6.4/A4
3
P6.5/A5
4
P6.6/A6
5
P6.7/A7/SVSIN
6
XT2OUT
52
XT2IN
53
RST/NMI
58
TCK
57
TDI/TCLK
55
TDO/TDI
54
TMS
56
Ve_REF+
10
V_REF+
7
V_REF−/Ve_REF−
11
XIN
8
XOUT
9
QFN Pad
NA
Terminal Functions (Continued)
I/O
DESCRIPTION
I/O General-purpose digital I/O / Timer_B, capture: CCI2A/B input, compare: Out2 output
I/O General-purpose digital I/O / Timer_B, capture: CCI3A/B input, compare: Out3 output
I/O General-purpose digital I/O / Timer_B, capture: CCI4A/B input, compare: Out4 output
I/O General-purpose digital I/O / Timer_B, capture: CCI5A/B input, compare: Out5 output
I/O General-purpose digital I/O / Timer_B, capture: CCI6A input, compare: Out6 output
I/O General-purpose digital I/O / Timer_B, clock signal TBCLK input
I/O General-purpose digital I/O / USCI B1 slave transmit enable / USCI A1 clock input/output
I/O General-purpose digital I/O / USCI B1slave in/master out in SPI mode, SDA I²C data in I²C mode
I/O General-purpose digital I/O / USCI B1slave out/master in in SPI mode, SCL I²C clock in I²C mode
I/O General-purpose digital I/O / USCI B1 clock input/output, USCI A1 slave transmit enable
I/O General-purpose digital I/O / main system clock MCLK output
I/O General-purpose digital I/O / submain system clock SMCLK output
I/O General-purpose digital I/O / auxiliary clock ACLK output
I/O
General-purpose digital I/O / switch all PWM digital output ports to high impedance − Timer_B TB0 to
TB6/SVS comparator output
I/O General-purpose digital I/O / analog input A0 – 12-bit ADC
I/O General-purpose digital I/O / analog input A1 – 12-bit ADC
I/O General-purpose digital I/O / analog input A2 – 12-bit ADC
I/O General-purpose digital I/O / analog input A3 – 12-bit ADC
I/O General-purpose digital I/O / analog input A4 – 12-bit ADC
I/O General-purpose digital I/O / analog input A5 – 12-bit ADC
I/O General-purpose digital I/O / analog input A6 – 12-bit ADC
I/O General-purpose digital I/O / analog input A7 – 12-bit ADC/SVS input
O Output of crystal oscillator XT2
I Input for crystal oscillator XT2
I Reset input, nonmaskable interrupt input port, or bootstrap loader start (in flash devices).
I Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start
I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
I/O Test data output. TDO/TDI data output or programming data input terminal
I Test mode select. TMS is used as an input port for device programming and test.
I Input for an external reference voltage
O Output of positive of the reference voltage in the ADC12
I
Negativefor the reference voltage for both sources, the internal reference voltage, or an external applied
reference voltage
I Input for crystal oscillator XT1. Standard or watch crystals can be connected.
O Output for crystal oscillator XT1. Standard or watch crystals can be connected.
NA QFN package pad connection to DV_SS recommended (RTD package only)
6
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