MSP430F249-EP_14 Datasheet, PDF (56/82 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F249-EP
MIXED SIGNAL MICROCONTROLLER
2008
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
12-bit ADC, built-in reference
PARAMETER
V_REF+
Positive built-in
reference voltage
output
AV_CC(min)
AV_CC minimum
voltage, Positive
built-in reference
active
I_VREF+
Load current out of
V_REF+ terminal
TEST CONDITIONS
REF2_5V = 1 (2.5 V),
I_VREF+max ≤ I_VREF+≤ I_VREF+min
REF2_5V = 0 (1.5 V),
I_VREF+max ≤ I_VREF+≤ I_VREF+min
REF2_5V = 0,
I_VREF+max ≤ I_VREF+≤ I_VREF+min
REF2_5V = 1,
−0.5mA ≤ I_VREF+≤ I_VREF+min
REF2_5V = 1,
−1mA ≤ I_VREF+≤ I_VREF+min
T_A
−55°C to 105°C
125°C
−55°C to 105°C
125°C
VCC
3V
3V
2.2 V/3 V
2.2V / 3 V
2.2 V
3V
MIN TYP MAX UNIT
2.4 2.5 2.6
2.37 2.5 2.64
V
1.44 1.5 1.56
1.42 1.5 1.57
2.2
2.8
V
2.9
0.01
−0.5
mA
0.01
−1
I_L(VREF)+ ^†
Load-current
regulation V_REF+
terminal
I_VREF+ = 500 μA ± 100 μA
Analog input voltage ~0.75 V;
REF2_5V = 0
I_VREF+ = 500 μA ± 100 μA,
Analog input voltage ~1.25 V,
REF2_5V = 1
2.2 V
3V
3V
±2
±2
LSB
±2
Load current
I_VREF+ =100 μA → 900 μA,
I_{DL(VREF) +‡} regulation V_REF+
C_VREF+=5 μF, ax ~0.5 × V_REF+
3V
terminal
Error of conversion result ≤ 1 LSB
20 ns
C_VREF+
T_REF+†
Capacitance at pin
V_REF+ (see Note 1)
Temperature
coefficient of built-in
reference
REFON =1,
0 mA ≤ I_VREF+ ≤ I_VREF+max
I_VREF+ is a constant in the range
of 0 mA ≤ I_VREF+ ≤ 1 mA
2.2 V/3 V
2.2 V/3 V
5
10
μF
±100 ppm/°C
t_REFON†
Settle time of
internal reference
voltage (see
Figure 38 and Note
2)
I_VREF+ = 0.5 mA, C_VREF+ = 10 μF,
V_REF+ = 1.5 V, V_AVCC = 2.2 V
17 ms
† _{Not production tested, limits characterized}
‡ _{Not production tested, limits verified by design}
NOTES: 1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses
two capacitors between pins V_REF+ and AV_SS and V_REF−/V_eREF− and AV_SS: 10-μF tantalum and 100-nF ceramic.
2. The condition is that the error in a conversion started after t_REFON is less than ±0.5 LSB. The settling time depends on the external
capacitive load.
56
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265