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MSP430F249-EP_14 Datasheet, PDF (29/82 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F249-EP
MIXED SIGNAL MICROCONTROLLER
2008
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
outputs − ports P1, P2, P3, P4, P5, and P6
PARAMETER
TEST CONDITIONS
VCC
MIN
MAX UNIT
VOH
VOL
NOTES:
IOH(max) = −1.5 mA, (see Note 1)
2.2 V VCC − 0.25
VCC
High-level output voltage
IOH(max) = −6 mA, (see Note 2)
IOH(max) = −1.5 mA, (see Note 1)
2.2 V VCC − 0.60
3 V VCC − 0.25
VCC
V
VCC
IOH(max) = −6 mA, (see Note 2)
3 V VCC − 0.60
VCC
IOL(max) = 1.5 mA, (see Note 1)
2.2 V
VSS VSS + 0.25
Low-level output voltage
IOL(max) = 6 mA, (see Note 2)
IOL(max) = 1.5 mA, (see Note 1)
2.2 V
3V
VSS VSS + 0.60
V
VSS VSS + 0.25
IOL(max) = 6 mA, (see Note 2)
3V
VSS VSS + 0.60
1. The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±12 mA to satisfy the maximum
voltage drop specified.
2. The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±48 mA to satisfy the maximum
voltage drop specified.
output frequency − ports P1, P2, P3, P4, P5, and P6
PARAMETER
TEST CONDITIONS
VCC
MIN TYP
MAX UNIT
fPx.y
Port output frequency P1.4/SMCLK, CL = 20 pF, RL = 1 kW
with load
(see Notes 1 and 2)
2.2 V
3V
DC
DC
10
MHz
12
fPort_CLK
Clock output frequency
P2.0/ACLK/CA2, P1.4/SMCLK, CL = 20 pF,
RL = 1 kW (see Note 2)
2.2 V
3.3 V
DC
DC
12
MHz
16
t(Xdc)
NOTES:
P1.0/TACLK/CAOUT, CL = 20 pF, LF mode
30
50
70
P1.0/TACLK/CAOUT, CL = 20 pF, XT1 mode
40
50
60 %
Duty cycle of output
frequency
P1.1/TA0, CL = 20 pF, XT1 mode
P1.1/TA0, CL = 20 pF, DCO
40
50% − 15 ns
60
50 50% + 15 ns
P1.4/SMCLK, CL = 20 pF, XT2 mode
40
60 %
P1.4/SMCLK, CL = 20 pF, DCO
50% − 15 ns
50% + 15 ns
1. A resistive divider with 2 times 0.5 kW between VCC and VSS is used as load. The output is connected to the center tap of the divider.
2. The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
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