LP3921 Datasheet, PDF (6/41 Pages) National Semiconductor (TI) – Battery Charger Management and Regulator Unit with Integrated Boomer® Audio Amplifier

LP3921
SNVS580A – AUGUST 2008 – REVISED MAY 2013
www.ti.com
Pin#
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Name
VIN2
LDO7
OUT+
VDD
OUT-
IN+
IN-
GND
BYPASS
LDO4
LDO3
LDO2
LDO1
VIN1
GNDA
SDA
SCL
BATT
CHG_IN
PWR_ON
IMON
PS_HOLD
TCXO_EN
HF_PWR
VSS
PON_N
RESET_N
ACOK_N
RX_EN
LP3921 Pin Descriptions⁽¹⁾ (continued)
Type⁽¹⁾ Description
P
Battery Input for LDO3 - LDO7
A
LDO7 Output (GP)
AO
Differential output +
P
DC power input to audio amplifier
AO
Differential output -
AI
Differential input +
AI
Differential input -
G
Analog Ground Pin
A
Amplifier bypass cap
A
LDO4 Output (TCXO)
A
LDO3 Output (ANA)
A
LDO2 Output (DIGI)
A
LDO1 Output (CORE)
P
Battery Input for LDO1 and LDO2
G
Analog Ground pin
DI/O
Serial Interface, Data Input/Output Open Drain output, external pull up resistor is needed.
(typ. 1.5k)
DI
Serial Interface Clock input. External pull up resistor is needed. (typ. 1.5k)
P
Main battery connection. Used as a power connection for current delivery to the battery.
P
DC power input to charger block from wall or car power adapters.
DI
Power up sequence starts when this pin is set HIGH. Internal 500k. pull-down resistor.
A
Charge current monitor output. This pin presents an analog voltage representation of the
input charging current. VIMON (mV) = (2.47 x ICHG)(mA).
DI
Input for power control from external processor/controller.
DI
Enable control for LDO4 (TX). HIGH = Enable, LOW = Disable.
DI
Power up sequence starts when this pin is set HIGH. Internal 500k. pull-down resistor.
G
Digital Ground pin
DO
Active low signal is PWR_ON inverted.
DO
Reset Output. Pin stays LOW during power up sequence. 60 ms after LDO1 (CORE) is
stable this pin is asserted HIGH.
DO
AC Adapter indicator, LOW when 4.5V- 6.0V present at CHG_IN.
DI
Enable control for LDO5 (RX). HIGH = Enable, LOW = Disable.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6
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