LP3921 Datasheet, PDF (29/41 Pages) National Semiconductor (TI) – Battery Charger Management and Regulator Unit with Integrated Boomer® Audio Amplifier

LP3921
www.ti.com
SNVS580A – AUGUST 2008 – REVISED MAY 2013
EXPOSED-DAP PACKAGE MOUNTING CONSIDERATIONS
The LP3921's exposed-DAP (die attach paddle) package (WQFN) provides a low thermal resistance between the
die and the PCB to which the part is mounted and soldered. this allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane and, finally, surrounding air. Failing to optimize thermal design
may compromise the LP3921's high-power performance and activate unwanted, though necessary, thermal
shutdown protection. The WQFN package must have its DAP soldered to a copper pad on the PCB> The DAP's
PCB copper pad is connected to a large plane of continuous unbroken copper. This plane forms a thermal mass
and heat sink and radiation area. Place the heat sink area on either outside plane in the case of a two-sided
PCB, or on an inner layer of a board with more than two layers. Connect the DAP copper pad to the inner layer
or backside copper heat sink area with a thermal via. The via diameter should be 0.012 in. to 0.013 in. Ensure
efficient thermal conductivity by plating-through and solder-filling the vias.
Best thermal performance is achieved with the largest practical copper heat sink area. In all circumstances and
conditions, the junction temperature must be held below 150°C to prevent activating the LP3921's thermal
shutdown protection. Further detailed and specific information concerning PCB layout, fabrication, and mounting
an WQFN package is available from TI's package Engineering Group under application note AN1187(SNOA401).
PCB LAYOUT AND SUPPLY REGULATION CONSIDERATIONS FOR DRIVING 4Ω LOADS
Power dissipated by a load is a function of the voltage swing across the load and the load's impedance. As load
impedance decreases, load dissipation becomes increasingly dependent on the interconnect (PCB trace and
wire) resistance between the amplifier output pins and the load's connections. Residual trace resistance causes
a voltage drop, which results in power dissipated in the trace and not in the load as desired. This problem of
decreased load dissipation is exacerbated as load impedance decreases. Therefore, to maintain the highest load
dissipation and widest output voltage swing, PCB traces that connect the output pins to a load must be as wide
as possible.
Poor power supply regulation adversely affects maximum output power. A poorly regulated supply's output
voltage decreases with increasing load current. Reduced supply voltage causes decreased headroom, output
signal clipping, and reduced output power. Even with tightly regulated supplies, trace resistance creates the
same effects as poor supply regulation. Therefore, making the power supply traces as wide as possible helps
maintain full output voltage swing.
POWER DISSIPATION
Power dissipation might be a major concern when designing a successful amplifier, whether the amplifier is
bridged or single-ended. Equation 2 states the maximum power dissipation point for a single-ended amplifier
operating at a given supply voltage and driving a specified output load.
P_DMAX = (V_DD)² / (2π²R_L) Single-Ended
(2)
However, a direct consequence of the increased power delivered to the load by a bridge amplifier is an increase
in internal power dissipation versus a single-ended amplifier operating at the same conditions.
P_DMAX = 4 * (V_DD)² / (2π²R_L) Bridge Mode
(3)
Since the LP3921 has bridged outputs, the maximum internal power dissipation is 4 times that of a single-ended
amplifier. Even with this substantial increase in power dissipation, the LP3921 does not require additional heat
sinking under most operating conditions and output loading. From Equation 3, assuming a 5V power supply and
an 8Ω load, the maximum power dissipation contribution from the audio amplifier is 625 mW. To this must be
added the power dissipated from the power management blocks. The maximum power dissipation thus obtained
(P_TOT) must not be greater than the power dissipation results from Equation 4:
P_TOT = P_PDMU + P_DMAX = (T_JMAX - T_A) / θ_JA
(4)
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