LP3921 Datasheet, PDF (27/41 Pages) National Semiconductor (TI) – Battery Charger Management and Regulator Unit with Integrated Boomer® Audio Amplifier

LP3921
www.ti.com
SNVS580A – AUGUST 2008 – REVISED MAY 2013
NO-LOAD STABILITY
The LDO's on the LP3921 will remain stable in regulation with no external load.
Table 19. LDO Output Capacitors Recommended Specification
Symbol
Parameter
Capacitor Type
Typ
C_o(LDO1)
C_o(LDO2)
C_o(LDO3)
C_o(LDO4)
C_o(LDO5)
C_o(LDO6)
C_o(LDO7)
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Capacitance
X5R. X74
1.0
Limit
Min
Max
0.7
2.2
0.7
2.2
0.7
2.2
0.7
2.2
0.7
2.2
0.7
2.2
0.7
2.2
Units
µF
µF
µF
µF
µF
µF
µF
Note: The capacitor tolerance should be 30% or better over the full temperature range. X7R or X5R capacitors
should be used. These specifications are given to ensure that the capacitance remains within these values over
all conditions within the application. See CAPACITOR CHARACTERISTICS.
Thermal Shutdown
The LP3921 has internal limiting for high on-chip temperatures caused by high power dissipation etc. This
Thermal Shutdown, TSD, function monitors the temperature with respect to a threshold and results in a device
power-down.
If the threshold of +160°C has been exceeded then the device will power down. Recovery from this TSD event
can only be initiated after the chip has cooled below +115°C. This device recovery is controlled by the
APU_TSD_EN bit (bit 1) in control register MISC, 8h'1C. See Table 21. If the APU_TSD_EN is set low then the
device will shutdown requiring a new start up event initiated by PWR_ON, HF_PWR, or CHG_IN. If
APU_TSD_EN is set high then the device will power up automatically when the shutdown condition clears. In this
case the control register settings are preserved for the device restart.
The threshold temperature for the device to clear this TSD event is 115°C. This threshold applies for any start up
thus the device temperature must be below this threshold to allow a start up event to initiate power up.
Further Register Information
STATUS REGISTER READ ONLY
Table 20. Register Address 8h'0C: Status⁽¹⁾
Bit
7
6
5
Name
PWR_ON_TRIG
HF-PWR-TRIG
CHG_IN_TRIG
Function (if bit = '1')
PMU startup is initiated by PWR_ON.
PMU startup is initiated by PWR_TRIG.
PMU startup is initiated by CHG_IN.
(1) Bits <4...0> are not used.
MISC CONTROL REGISTER
Table 21. Register Address 8h'1C: Misc.⁽¹⁾
Bit
1
Name
APU_TSD_EN
0
PWR_HOLD_DELAY
Function (if bit = '1')
1b'0: Device will shut down completely if thermal shutdown occurs. Requires a new
startup event to restart the PMU.
1b'1: Device will start up automatically after thermal shutdown condition is removed.
(Device tries to keep its internal state.)
1b'0: If PWR_HOLD is low for 35 ms, the device will shutdown. (Default)
1b'1: If PWR_HOLD is low for 350 ms, the device will shut down.
(1) Bits <7...2> are not used.
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