LP3921 Datasheet, PDF (30/41 Pages) National Semiconductor (TI) – Battery Charger Management and Regulator Unit with Integrated Boomer® Audio Amplifier

LP3921
SNVS580A – AUGUST 2008 – REVISED MAY 2013
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P_DPMU is mainly the sum of power dissipated in the charger and LDO blocks as shown in Equation 5:
P_DPMU = I_CHG (V_{CHG_IN} − V_BATT) + (I_OUT1 (V_BATT − V_OUT1) + (I_OUT2 (V_BATT − V_OUT2) + (I_OUT3 (V_BATT − V_OUT3) + ... (approx.) (5)
The LP3921's θ_JA in an RTV0032A package is 30°C/W. Depending on the ambient temperature, T_A, of the
system surroundings, Equation 4 can be used to find the maximum internal power dissipation supported by the
IC packaging.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection ratio (PSRR). The capacitor location on both the bypass and power supply pins should be as close to
the device as possible. A larger half-supply bypass capacitor improves PSRR because it increases half-supply
stability. Typical applications employ a 5V regulator with 10 µF and 0.1 µF bypass capacitors that increase
supply stability. This, however, does not eliminate the need for bypassing the supply nodes of the LP3921. The
LP3921 will operate without the bypass capacitor C_B, although the PSRR may decrease. A 1 µF capacitor is
recommended for C_B. This value maximizes PSRR performance. Lesser values may be used, but PSRR
decreases at frequencies below 1 kHz. The issue of C_B selection is thus dependant upon desired PSRR and
click and pop performance as explained in PROPER SELECTION OF EXTERNAL COMPONENTS.
SHUTDOWN FUNCTION
In order to reduce power consumption while not in use, the audio amplifier can be shut down by setting amp_en
to 0 in the Audio_Amp register. On power-up, the audio amplifier is in shut down until enabled. (Contact NSC
sales for a different option.) (See Table 22.)
Thermal shutdown of the PMU will shut down the audio amplifier. (See Thermal Shutdown for recovery options.)
Independent temperature sensing within the audio amplifier may also shut down the audio amplifier alone,
without affecting PMU control logic.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical when
optimizing device and system performance. Although the LP3921 is tolerant to a variety of external component
combinations, consideration of component values must be made when maximizing overall system quality.
The LP3921 is unity-gain stable, giving the designer maximum system flexibility. The LP3921 should be used in
low closed-loop gain configurations to minimize THD+N values and maximize signal to noise ratio. Low gain
configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1
Vrms are available from sources such as audio codecs. Please refer to AUDIO POWER AMPLIFIER DESIGN for
a more complete explanation of proper gain selection. When used in its typical application as a fully differential
power amplifier the LP3921 does not require input coupling capacitors for input sources with DC common-mode
voltages of less than V_DD. Exact allowable input common-mode voltage levels are actually a function of V_DD, R_i,
and R_f and may be determined by Equation 5:
V_CMi < (V_DD-1.2)*((R_f+(R_i)/(R_f)-V_DD*(R_i / 2R_f)
(6)
-R_F / R_I = A_VD
(7)
Special care must be taken to match the values of the feedback resistors (R_F1 and R_F2) to each other as well as
matching the input resistors (R_i1 and R_i2) to each other (see Figure 10) more in front. Because of the balanced
nature of differential amplifiers, resistor matching differences can result in net DC currents across the load. This
DC current can increase power consumption, internal IC power dissipation, reduce PSRR, and possibly
damaging the loudspeaker. Table 23 demonstrates this problem by showing the effects of differing values
between the feedback resistors while assuming that the input resistors are perfectly matched. The results below
apply to the application circuit shown in Figure 10, and assumes that V_DD = 5V, R_L = 8Ω, and the system has DC
coupled inputs tied to ground.
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