DS50PCI401_13 Datasheet, PDF (6/36 Pages) Texas Instruments – DS50PCI401 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Repeater with Equalization and De-Emphasis

DS50PCI401
SNLS292J – JUNE 2009 – REVISED APRIL 2013
www.ti.com
FUNCTIONAL DESCRIPTION
The DS50PCI401 is a low power media compensation 4 lane repeater optimized for PCI Express Gen 1 and Gen
2 media including lossy FR-4 printed circuit board backplanes and balanced cables. The DS50PCI401 operates
in two modes: Pin Control Mode (ENSMB = 0) and SMBus Mode (ENSMB = 1).
Pin Control Mode:
When in pin mode (ENSMB = 0) , the repeater is configurable with external pins. Equalization and de-emphasis
can be selected via pin for each side independently. When de-emphasis is asserted VOD is automatically
increased per the De-Emphasis table below for improved performance over lossy media. The receiver detect
pins RXDETA/B provide manual control for input termination (50Ω or >50KΩ). Rate optimization is also pin
controllable, with pin selections for 2.5Gbps, 5Gbps, and auto detect. The receiver electrical idle detect threshold
is also programmable via an optional external resistor on the SD_TH pin.
SMBUS Mode:
When in SMBus mode the equalization, de-emphasis, and termination disable features are all programmable on
a individual lane basis, instead of grouped by sides as in the pin mode case. Upon assertion of ENSMB the
RATE, EQx and DEMx functions revert to register control immediately. The EQx and DEMx pins are converted to
AD0-AD3 SMBus address inputs. The other external control pins remain active unless their respective registers
are written to and the appropriate override bit is set, in which case they are ignored until ENSMB is driven low.
On powerup and when ENSMB is driven low all registers are reset to their default state. If PRSNT is asserted
while ENSMB is high, the registers retain their current state.
EQ1 ⁽¹⁾
F
1
0
F
1
F
0
0
1
Table 2. Equalization Input Select Pins for A and B ports (3–Level Input)
EQ0 ⁽¹⁾
Equalization Level
Suggested Use
F
Off
Bypass
1
Approx. 4 dB at 2.5Ghz
8 inches FR4 (6-mil trace) or less than 1 meter (28 AWG) PCIe cable
0
Approx. 9.6 dB at 2.5GHz
14 inches FR4 (6-mil trace) or 1 meter (28 AWG) PCIe cable
0
Approx. 11.4 dB at 2.5Ghz
20 inches FR4 (6-mil trace) or 5 meters (26 AWG) PCIe cable
0
Approx. 15.5 dB at 2.5Ghz
30 inches FR4 (6-mil trace) or 7 meters (24 AWG) PCIe cable
1
Approx. 17 dB at 2.5Ghz
40 inches FR4 (6-mil trace) or 9 meters (24 AWG) PCIe cable
1
Approx.19.1 dB at 2.5Ghz
50 inches FR4 (6-mil trace) or 10 meters (24 AWG) PCIe cable
F
Approx. 20.6 dB at 2.5Ghz
15 meters (24 AWG) PCIe cable
F
Approx. 26.3 dB at 2.5Ghz
>15 meters (24 AWG) PCIe cable
(1) F=Float (don't drive pin, each float pin has an internal 50K Ohm resistor to VDD and GND), 1=High, 0=Low
RATE
0/F
0/F
0/F
0/F
0/F
0/F
0/F
0/F
0/F
1/F
1/F
Table 3. De-Emphasis Input Select Pins for A and B ports (3–Level Input)
DEM1 DEM0⁽¹
Typical De-
(1)
)
Emphasis Level
Typical DE Pulse
Width
Typical VOD
Suggested Use
0
0
0dB
0ps
1000mV
0
1
-3.5dB
400ps
1000mV
8 inches FR4 (6-mil trace) or less than 1
meter (28 AWG) PCIe cable
1
0
-6dB
400ps
1000mV
1
1
-6dB
400ps enhanced
1000mV
15 inches FR4 (6-mil trace)
0
F
-9dB
400ps enhanced
1000mV
1
F
-12dB
400ps enhanced
1000mV
F
0
-9dB
400ps enhanced
1200mV
30 inches FR4 (6-mil trace)
F
1
-12dB
400ps enhanced
1400mV
40 inches FR4 (6-mil trace)
F
F
Reserved, don't
use
0
0
0dB
0ps
1000mV
0
1
-3.5dB
200ps
1000mV
(1) F=Float (don't drive pin - (each float pin has an internal 50K Ohm resistor to VDD and GND). Enhanced DE Pulse width provides
additional de-emphasis on second bit. VOD = Voltage Output Differential amplitude. When RATE is floated (F=Auto Rate Detection
Active) DE Level and Pulse Width settings follow detected RATE. RATE=0 is 2.5GBps, RATE=1 is 5 GBps
6
Submit Documentation Feedback
Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: DS50PCI401