DS50PCI401_13 Datasheet, PDF (5/36 Pages) Texas Instruments – DS50PCI401 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Repeater with Equalization and De-Emphasis

DS50PCI401
www.ti.com
SNLS292J – JUNE 2009 – REVISED APRIL 2013
Table 1. Pin Descriptions (continued)
Pin Name
Pin Number
Control Pins — Both Modes (LVCMOS)
RXDETA,RXDETB
22,23
PRSNT
52
I/O, Type
I, LVCMOS
w/internal
pulldown
I, LVCMOS
ENRXDET
TXIDLEA,TXIDLEB
Analog
SD_TH
26
24,25
27
I, LVCMOS
w/internal
pulldown
I, FLOAT,
LVCMOS
I, ANALOG
Power
VDD
GND
9, 14,36, 41, 51
DAP
Power
Power
Pin Description
The RXDET pins in combination with the ENRXDET pin controls the
receiver detect function. Depending on the input level, a 50Ω or >50KΩ
termination to the power rail is enabled. Refer to Table 6.
Cable Present Detect input. High when a cable is not present per PCIe
Cabling Spec. 1.0. Puts part into low power mode. When low (normal
operation) part is enabled.
Enables pin control of receiver detect function. Pin must be pulled high
externally for RXDETA/B to function. Controls both A and B sides. Refer
to Table 6.
Controls the electrical idle function on corresponding outputs when
enabled. H= electrical Idle, Float=autodetect (Idle on input passed to
output), L=Idle squelch disabled as shown in Table 4.
Threshold select pin for electrical idle detect threshold. Float pin for
default 130mV DIFF p-p, otherwise connect resistor from SD_TH to GND
to set threshold voltage as shown in Table 5.
Power supply pins CML/analog.
Ground pad (DAP - die attach pad).
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