DRV8332-HT Datasheet, PDF (6/26 Pages) Texas Instruments – THREE PHASE PWM MOTOR DRIVER

DRV8332-HT
SLES274B – AUGUST 2013 – REVISED JANUARY 2014
NAME
PWM_B
PWM_C
RESET_A
RESET_B
RESET_C
FAULT
PIN
FUNCTION ⁽¹⁾
8
I
18
I
7
I
16
I
17
I
5
O
VDD
21
P
VREG
12
P
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DESCRIPTION
Input signal for half-bridge B
Input signal for half-bridge C
Reset signal for half-bridge A, active-low
Reset signal for half-bridge B, active-low
Reset signal for half-bridge C, active-low
Fault signal, open-drain, active-low. An internal pull-up resistor to VREG (3.3 V) is
provided on output. Level compliance for 5-V logic can be obtained by adding external
pull-up resistor to 5 V
Power supply for digital voltage regulator requires capacitor to ground for decoupling.
Digital regulator supply filter pin requires 0.1-μF capacitor to AGND.
SYSTEM BLOCK DIAGRAM
OTW
FAULT
M1
M2
M3
Internal Pullup
Resistors to VREG
Protection
and
I/O Logic
Under-
voltage
Protection
4
4
Power
On
Reset
Temp.
Sense
VREG
VDD
VREG
AGND
GND
RESET_A
RESET_B
RESET_C
Overload
Protection
PWM_C
PWM
Rcv.
Ctrl.
Timing
Gate
Drive
I_sense
OC_ADJ
GVDD_C
BST_C
PVDD_C
OUT_C
PWM_B
PWM
Rcv.
Ctrl.
Timing
Gate
Drive
GND_C
GVDD_B
BST_B
PVDD_B
OUT_B
PWM_A
PWM
Rcv.
Gate
Ctrl.
Timing
Drive
GND_B
GVDD_A
BST_A
PVDD_A
OUT_A
GND_A
6
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