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DRV8332-HT Datasheet, PDF (5/26 Pages) Texas Instruments – THREE PHASE PWM MOTOR DRIVER
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Pin Assignment
DRV8332-HT
DEVICE INFORMATION
SLES274B – AUGUST 2013 – REVISED JANUARY 2014
GVDD_B
OTW
NC
NC
FAULT
PWM_A
RESET_A
PWM_B
OC_ADJ
GND
AGND
VREG
M3
M2
M1
RESET_B
RESET_C
PWM_C
NC
NC
VDD
GVDD_C
DDV PACKAGE
(TOP VIEW)
1
44
2
43
3
42
4
41
5
40
6
39
7
38
8
37
9
36
10
35
11
34
12
33
13
32
14
31
15
30
16
29
17
28
18
27
19
26
20
25
21
24
22
23
GVDD_A
BST_A
NC
PVDD_A
PVDD_A
OUT_A
GND_A
GND_B
OUT_B
PVDD_B
BST_B
NC
NC
GND
GND
GND_C
OUT_C
PVDD_C
PVDD_C
NC
BST_C
GVDD_C
Pin Functions
NAME
AGND
BST_A
BST_B
BST_C
GND
GND_A
GND_B
GND_C
GVDD_A
GVDD_B
GVDD_C
M1
M2
M3
NC
OC_ADJ
OTW
PIN
11
43
34
24
10, 30, 31
38
37
29
44
2
22, 23
15
14
13
3,4,19,20,25,32, 33, 42
9
2
OUT_A
OUT_B
OUT_C
PVDD_A
PVDD_B
PVDD_C
PWM_A
39
36
28
40, 41
35
26, 27
6
FUNCTION (1)
P
P
P
P
P
P
P
P
P
P
P
I
I
I
-
O
O
O
O
O
P
P
P
I
DESCRIPTION
Analog ground
High side bootstrap supply (BST), external capacitor to OUT_A required
High side bootstrap supply (BST), external capacitor to OUT_B required
High side bootstrap supply (BST), external capacitor to OUT_C required
Ground
Power ground for half-bridge A
Power ground for half-bridge B
Power ground for half-bridge C
Gate-drive voltage supply
Gate-drive voltage supply
Gate-drive voltage supply
Mode selection pin
Reserved mode selection pin, AGND connection is recommended
Reserved mode selection pin, VREG connection is recommended
No connection pin. Ground connection is recommended
Analog overcurrent programming pin, requires resistor to AGND
Overtemperature warning signal, open-drain, active-low. An internal pull-up resistor to
VREG (3.3 V) is provided on output. Level compliance for 5-V logic can be obtained by
adding external pull-up resistor to 5 V
Output, half-bridge A
Output, half-bridge B
Output, half-bridge C
Power supply input for half-bridge A requires close decoupling capacitor to ground.
Power supply input for half-bridge B requires close decoupling capacitor to gound.
Power supply input for half-bridge C requires close decoupling capacitor to ground.
Input signal for half-bridge A
(1) I = input, O = output, P = power, T = thermal
Copyright © 2013–2014, Texas Instruments Incorporated
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