BQ24140_14 Datasheet, PDF (6/39 Pages) Texas Instruments – Integrated Dual-Input Switch-Mode One-Cell Li-Ion Charger with Full USB Compliance and USB-OTG Support

bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Circuit of Figure 1, V_BUS = 5V, HZ_MODE=0, OPA_MODE=0, CD=0, T_J = –40°C–125°C and T_J = 25°C for typical values
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
V_OL
Output low threshold level
V_IL
Input low threshold level
V_IH
Input high threshold level
I_(bias)
Input bias current
f_SCL
SCL clock frequency
BATTERY DETECTION
I_O = 10 mA, sink current
V_(pull-up) = 1.8 V, SDA and SCL
V_(pull-up) = 1.8 V, SDA and SCL
V_(pull-up) = 1.8 V, SDA and SCL
0.4
0.4
1.2
1
3.4
V
V
V
μA
MHz
I_DETECT
Battery detection current before charge
done (sink current)⁽¹⁾
Begins after termination detected
-0.5
mA
t_DETECT
t_DETECT2
Battery detection time
Battery detection time after linear charge
is complete and PWM starts
262
ms
262
ms
SLEEP COMPARATOR
V_SLP
Sleep-mode entry threshold, V_BUS-V_VBAT
or V_IN – V_VBAT
V_SLP-EXIT
Sleep-mode exit hysteresis
Deglitch time for V_BUS or V_IN rising above
V_SLP+V_{SLP_EXIT}
UNDER-VOLTAGE LOCKOUT (UVLO)
2.3 V ≤ V_VBAT ≤ V_OREG, V_BUS or V_IN falling
2.3 V ≤ V_VBAT ≤ V_OREG
Rising voltage, 2-mV over drive, t_RISE = 100 ns
0
40 100 mV
70
110 200 mV
30
ms
V_UVLO
V_{UV_HYS}
PWM
IC active threshold voltage
IC active hysteresis
V_BUS or V_IN rising
V_BUS or V_IN falling from above V_UVLO
3.05
3.3 3.65
V
90
100
mV
V_BOOT
Voltage from BOOT1 pin to SW1 pin, or
Voltage from BOOT2
pin to SW2 pin
6.5
V
R_{ON_Q1}
Internal top reverse blocking MOSFET
on-resistance
I_{IN_LIMIT} = 500 mA, Measured from V_IN to PMID2
100 150 mΩ
R_{ON_Q2}
Internal top N-channel Switching
MOSFET on-resistance
Measured from PMID2 to SW2, V_BOOT2 – V_SW2 = 4 V
120 200 mΩ
R_{ON_Q3}
Internal bottom N-channel MOSFET
on-resistance
Measured from SW2 to GND
110 200 mΩ
R_{ON_Q4}
Internal top reverse blocking MOSFET
on-resistance
I_{IN_LIMIT} = 500 mA, Measured from V_BUS to PMID1
100 150 mΩ
R_{ON_Q5}
Internal top N-channel Switching
MOSFET on-resistance
Measured from PMID1 to SW1, V_BOOT1 – V_SW1 = 4 V
120 200 mΩ
R_{ON_Q6}
Internal bottom N-channel MOSFET
on-resistance
Measured from SW1 to GND
110 200 mΩ
f_OSC
Oscillator frequency
Frequency accuracy
–10%
3.0
10%
MHz
D_MAX
D_MIN
Maximum duty cycle
Minimum duty cycle
Synchronous mode to non-synchronous
mode transition current threshold⁽²⁾
Low-side MOSFET cycle-by-cycle current sensing
99.5%
0
100
mA
CHARGE MODE PROTECTION
V_OVP-VIN
V_OVP-VBUS
Input OVP for VIN
V_{OVP VIN} hysteresis
Input OVP for VBUS
VOVP VBUS hysteresis
Rising edge
Rising edge
9.6
9.8 10.0
V
140
mV
6.3
6.5 6.7
V
170
mV
V_OVP
I_LIMIT
V_SHORT
I_SHORT
Output OVP threshold voltage
VOVP hysteresis
Cycle-by-cycle current limit for charge
Trickle to fast charge threshold
V_SHORT hysteresis
Trickle charge charging current
V_VBAT threshold over V_OREG to turn off charger during charge
Lower limit for V_VBAT falling from above V_OVP
Charge mode operation
V_VBAT rising
V_VBAT ≤ V_SHORT
110
117 121 %V_OREG
11
%V_OREG
1.8
2.4 3.0
A
2.0
2.1 2.2
V
100
mV
20
30 40 mA
(1) Negative charge current means the charge current flows from the battery to charger (discharging battery).
(2) Bottom N-channel MOSFET always turns on for ~60 ns and then turns off if current is too low.
6
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