OMAP5912_16 Datasheet, PDF (57/270 Pages) Texas Instruments – OMAP5912 Applications Processor

Introduction
Table 2−3. ZDY/GDY Package Terminal Characteristics (Continued)
ZDY/
GDY
BALL
NO.
SIGNAL NAME
TYPE^†
MUX CTRL SETTING PULLUP/
(see Notes 3 and 4) PULLDN^‡
BUFFER
STRENGTH^§
OTHER^¶
RESET
STATE^#
SUPPLY
T4
LOW_STATE
UART2.RTS
O
RegC[26:24] = 000
O
RegC[26:24] = 001
2 mA (Lv) A, F, G2
0
3 mA (Hv)
DV_DD3
USB2.SE0
O
RegC[26:24] = 010
MPUIO5
I/O
RegC[26:24] = 011
MPUIO12
I/O
RegC[26:24] = 100
USB0.SE0
O
RegC[26:24] = 101
LOW_STATE
O
RegC[26:24] = 110
R4
LOW_STATE
UART2.TX
O
RegC[29:27] = 000
PU20,
2 mA (Lv) A, F, G2
0
O
RegC[29:27] = 001
PD20
3 mA (Hv)
DV_DD3
USB2.TXD
O
RegC[29:27] = 010
USB0.TXD
O
RegC[29:27] = 101
Z_STATE
Z
RegC[29:27] = 110
GPIO17
I/O
RegC[29:27] = 111
P5
UART2.BCLK
SYS_CLK_IN
O
RegD[2:0] = 000
I
RegD[2:0] = 110
2 mA (Lv) A, F, G2
0
3 mA (Hv)
DV_DD3
U3
MCLK
MMC2.DATDIR0
O
RegB[17:15] = 000
PU20,
2 mA (Lv) A, F, G1
0
O
RegB[17:15] = 110
PD20
3 mA (Hv)
DV_DD3
GPIO24
I/O
RegB[17:15] = 111
P4
USB.PUEN
USB.CLKO
O
RegD[5:3] = 000
PU20,
2 mA (Lv) A, F, G1
1
O
RegD[5:3] = 001
PD20
3 mA (Hv)
DV_DD2
USB.PUDIS
O
RegD[5:3] = 011
Z_STATE
Z
RegD[5:3] = 100
LOW_POWER
O
RegD[5:3] = 110
GPIO58
I/O
RegD[5:3] = 111
T2
USB.DP
I2C.SDA
I/O
I/O/Z
USBTCTL[6:4] = 000
USBTCTL[6:4] = 100
18.3 mA
C
(in USB mode)
Z
DV_DD2
UART1.RX
I
USBTCTL[6:4] = 101
USB.PUEN
O
USBTCTL[6:4] = 111
† _{I = Input, O = Output, Z = High-Impedance}
‡ _{PD20 = 20-µA internal pulldown, PD100=100-µA internal pulldown, PU20 = 20-µA internal pullup, PU100 = 100-µA internal pullup. Pullup or}
pulldown can be enabled or disabled by software.
§ _{Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)}
¶ _{A = Standard LVCMOS input/output}
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I²C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20 Ω to match with PCB line impedance and ensure proper signal integrity
# _{Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low}
|| _{Slew time constraint of the EXT_DMA_REQ1 must be lower than or equal to 10 ns (from 10% to 90% of DVDD) in Mode 1.}
kSlew time constraint of the EXT_DMA_REQ0 must be lower than or equal to 10 ns (from 10% to 90% of DV_DD) in Mode 1.
NOTES: 3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x
December 2003 − Revised December 2005
SPRS231E
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