OMAP5912_16 Datasheet, PDF (27/270 Pages) Texas Instruments – OMAP5912 Applications Processor

Introduction
ZDY/
GDY
BALL
NO.
E17
Table 2−1. ZDY/GDY Package Terminal Assignments (Continued)
SIGNAL
ZDY/
GDY
BALL
NO.
SIGNAL
ZDY/
GDY
BALL
NO.
SIGNAL
ZDY/
GDY
BALL
NO.
KB.R[1](0)/
MPUIO9(1)
F1
FLASH.A[11](0)
F2
FLASH.A[10](0)
F3
SIGNAL
FLASH.A[25]
F4
FLASH.A[20]
F8
SDRAM.A[10]
F12
V_SS
F5
FLASH.A[12](0)
F9
SDRAM.A[9]
KB.R[4](0)/
F13
MPUIO15(1)
F6
V_SS
F7
LCD.AC(0)/
F10 SYS_CLK_OUT(1)/
F11
Z_STATE^†(2)
KB.C[0](0)/
F14
MPUIO0(1)
F15
SDRAM.A[2]
LCD.P[9](0)/
Z_STATE^†(1)/
GPIO30(7)
KB.R[0](0)/
MPUIO8(1)
MCBSP1.CLKX(0)/
KB.C[5](0)/
F16
GPIO54(7)
F17
GPIO28(7)
G1
DV_DD5
G2
FLASH.A[15](0)
G3
FLASH.A[13](0)
G7
V_SS
G11
V_SS
G4
G8
G12
FLASH.A[14](0)
CV_DD2
DV_DD1
G5
FLASH.A[16](0)
G6
FLASH.A[17]
G9
CV_DD2
G10
CV_DD3
MCBSP1.DX(0)/
MCBSP1.CLKS(0)/
MCBSP1.FSX(1)/
G13
GPIO62(7)
G14
MCBSP1.DXZ(2)/
GPIO52(7)
MCBSP1.FSX(0)/
CAM.LCLK(0)/
MCBSP1.DX(1)/
ETM.CLK(1)/
MCBSP1.DR(0)/
G15
MCBSP1.DXZ(2)
G16
UWIRE.SCLK(2)/
G17
GPIO51(7)
H1
GPIO53(7)
GPIO39(7)
LDO.FILTER
H2
FLASH.A[22]
H3
FLASH.A[18]
H6
FLASH.ADV
H7
CV_DD2
H10
V_SS
H11
CV_DD3
H4
FLASH.A[19]
H5
H8
V_SS#
H9
CAM.EXCLK(0)/
ETM.SYNC[0](1)/
H12
UWIRE.SDO(2)/
H13
LOW_STATE^§ (6)/
GPIO57(7)
FLASH.A[21]
V_SS
CAM.D[3](0)/
ETM.D[3](1)/
UART3.RX(2)/
GPIO31(7)
CAM.D[6](0)/
ETM.D[6](1)/
MPU_BOOT(0)/
H14
USB1.SUSP(2)
H15
UWIRE.CS3(2)/
MMC2.CMD/
GPIO34(7)
CAM.D[7](0)/
CAM.D[5](0)/
ETM.D[7](1)/
ETM.D[5](1)/
H16
UWIRE.CS0(2)/
H17
UWIRE.SDI(2)/
MMC2.DAT2(3)/
GPIO33(7)
GPIO35(7)
FLASH.BE[0](0)/
J1
FLASH.CS2UOE(1)/
J2
GPIO59(7)
FLASH.A[23]
FLASH.CS1(0)/
J3
FLASH.CS1L(1)
J4
FLASH.A[24]
GPIO62(0)/
FLASH.CS3(0)/
J5
FLASH.CS0(1)
J6
GPIO3(7)
J7
FLASH.D[3]
FLASH.CS2(0)/
J8
FLASH.BAA(1)/
FLASH.CS2L(2)
† _{Z_STATE = high-impedance}
‡ _{“NC” denotes “No Connect”.}
§ _{LOW_STATE = 0}
¶ _{Signal must be tied low.}
# _{For special consideration with respect to the connection of the VSS pin (ZDY/GDY ball H8), refer to Section 5.5.1, 32-kHz Oscillator and Input}
Clock.
NOTES: 1. Shading denotes signals with multiplexed functions.
2. The number within parenthesis at the end of a signal name denotes the Pin Mux setting (see the MUX CTRL SETTING column
in Table 2−3 and Table 2−4).
December 2003 − Revised December 2005
SPRS231E
27