OMAP5912_16 Datasheet, PDF (42/270 Pages) Texas Instruments – OMAP5912 Applications Processor

Introduction
Table 2−3. ZDY/GDY Package Terminal Characteristics (Continued)
ZDY/
GDY
BALL
NO.
SIGNAL NAME
TYPE^†
MUX CTRL SETTING PULLUP/
(see Notes 3 and 4) PULLDN^‡
BUFFER
STRENGTH^§
OTHER^¶
RESET
STATE^#
SUPPLY
F10
LCD.AC
SYS_CLK_OUT
O
RegD[11:9] = 000
O
RegD[11:9] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
Z_STATE
Z
RegD[11:9] = 010
A14
LCD.PCLK
Z_STATE
O
RegD[17:15] = 000
Z
RegD[17:15] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
C12
LCD.P[15]
Z_STATE
O
RegD[20:18] = 000
Z
RegD[20:18] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO2
I/O
RegD[20:18] = 111
D12
LCD.P[14]
Z_STATE
O
RegD[23:21] = 000
Z
RegD[23:21] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO35
I/O
RegD[23:21] = 111
E11
LCD.P[13]
Z_STATE
O
RegD[26:24] = 000
Z
RegD[26:24] = 001
2 mA (Lv) F, A, G1
0
3 mA (Hv)
DV_DD1
GPIO34
I/O
RegD[26:24] = 111
A13
LCD.P[12]
Z_STATE
O
RegD[29:27] = 000
Z
RegD[29:27] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO33
I/O
RegD[29:27] = 111
B14
LCD.P[11]
Z_STATE
O
RegE[2:0] = 000
Z
RegE[2:0] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO32
I/O
RegE[2:0] = 111
A15
LCD.P[10]
Z_STATE
O
RegE[5:3] = 000
Z
RegE[5:3] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO31
I/O
RegE[5:3] = 111
F11
LCD.P[9]
Z_STATE
O
RegE[8:6] = 000
Z
RegE[8:6] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
GPIO30
I/O
RegE[8:6] = 111
B15
LCD.VS
Z_STATE
O
RegE[11:9] = 000
Z
RegE[11:9] = 001
2 mA (Lv) A, F, G1
0
3 mA (Hv)
DV_DD1
† _{I = Input, O = Output, Z = High-Impedance}
‡ _{PD20 = 20-µA internal pulldown, PD100=100-µA internal pulldown, PU20 = 20-µA internal pullup, PU100 = 100-µA internal pullup. Pullup or}
pulldown can be enabled or disabled by software.
§ _{Lv = Low voltage (1.65 V), Hv = High voltage (2.5 V)}
¶ _{A = Standard LVCMOS input/output}
G1 = Terminal may be gated by BFAIL
B = SUBLVDS input/ouput
G2 = Terminal may be gated by GPIO9 and MPUIO3
C = USB transceiver input/ouput
G3 = Terminal my be gated by BFAIL and OMAP5912 Internal Reset
D = I²C input/output buffers
H1 = Terminal may be 3-stated by BFAIL input
E = Analog oscillator terminals
H3 = MCSI1.DOUT pin can be forced into a high-impedance
F = Boundary-scannable terminal
state by the OMAP5912 HIGH_IMP3 control bit
K = Output buffer includes a serial resistor of 20 Ω to match with PCB line impedance and ensure proper signal integrity
# _{Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low}
|| _{Slew time constraint of the EXT_DMA_REQ1 must be lower than or equal to 10 ns (from 10% to 90% of DVDD) in Mode 1.}
kSlew time constraint of the EXT_DMA_REQ0 must be lower than or equal to 10 ns (from 10% to 90% of DV_DD) in Mode 1.
NOTES: 3. NA denotes no multiplexing on the ball
4. ‘Regx’ denotes the terminal multiplexing register that controls the specified terminal where Regx = FUNC_MUX_CTRL_x
42 SPRS231E
December 2003 − Revised December 2005