DS99R421_14 Datasheet, PDF (5/27 Pages) Texas Instruments – 5-43 MHz FPD-Link LVDS (3 Data + 1 Clock) to FPD-Link II LVDS (Embedded Clock DC DCBalanced)

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DS99R421
SNLS264D – JUNE 2007 – REVISED APRIL 2013
Receiver Input Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
Max
RITOL-L
Receiver Input Tolerance Left
(Figure 7 Figure 8) ^{(1) (2)}
5 MHz–43 MHz
0.3
RITOL-R
UI
Receiver Input Tolerance
Right
(Figure 7 Figure 8) ^{(1) (2)}
Unit Interval ⁽¹⁾
5 MHz–43 MHz
5 MHz–43 MHz
0.3
1/7th of
RxCLKIN
Units
UI
UI
ns
(1) UI – Unit Interval, equivalent to one ideal serialized data bit width. The UI scales with frequency.For the input, it is 1/7th the input clock
period. Example 43 MHz = 23.26 ns. 1/7th of this is 3.32 ns. This is 1 UI of the input at 43 MHz.For the output, it is 1/28th of the input
clock period. Example 43 MHz = 23.26 ns. 1/28th of this is 831 ps. This is 1 UI of the output at 43 MHz.
(2) Receiver Input Tolerance is defined as the valid data sampling region at the receiver inputs. This margin takes into account the
transmitter pulse positions (min and max) and the receiver input setup and hold time (internal data sampling window – RSPos). This
margin allows for LVDS interconnect skew, inter-symbol interference (both dependent on type/length of cable), and clock jitter.
Input Timing Requirements for OS[2:0]
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
F_OS[2:0]
Maximum Frequency
Limitation of OS[2:0]
OS[2:0]
Max
F_RxCLKIN / 5
Units
MHz
Input to Output Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
RCTCD
RxCLK IN to DOUT Delay
(Figure 5), ⁽¹⁾
5 MHz–43 MHz _{4T + 1.0}
4T + 5.0
PDD
Power Down Delay
5 MHz–43 MHz
(1) A Clock Unit Symbol (T) is defined as 1/ (Line rate of RxCLKIN).
Max
4T + 10.0
1
Serializer Output Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
t_LLHT
t_LHLT
LVDS Low-to-High Transition Time
LVDS High-to-Low Transition Time
R_T = 100Ω,
C_L = 10 pF to GND
(Figure 4)
0.3
0.5
0.3
0.5
t_PLT
PLL Lock Time
TxOUT_E_O TxOUT_Eye_Opening^{(1) (2)}(Figure 9)
UI
Unit Interval⁽¹⁾
5 MHz–43 MHz
5 MHz–43 MHz
(respect to ideal)
5 MHz–43 MHz
10
0.78
1/28th of
DOUT
Units
ns
µs
Units
ns
ns
ms
UI
ns
(1) UI – Unit Interval, equivalent to one ideal serialized data bit width. The UI scales with frequency.For the input, it is 1/7th the input clock
period. Example 43 MHz = 23.26 ns. 1/7th of this is 3.32 ns. This is 1 UI of the input at 43 MHz.For the output, it is 1/28th of the input
clock period. Example 43 MHz = 23.26 ns. 1/28th of this is 831 ps. This is 1 UI of the output at 43 MHz.
(2) TxOUT_E_O is affected by pre-emphasis value.
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