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BQ24070_14 Datasheet, PDF (5/33 Pages) Texas Instruments – System Power-Path Management IC
www.ti.com
bq24070, bq24071
SLUS694G – MARCH 2006 – REVISED DECEMBER 2014
7.4 Thermal Information
THERMAL METRIC(1)
bq2407x
RHL
UNIT
20 PINS
RθJA
RθJC(top)
RθJB
ψJT
ψJB
RθJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
40.1
42.0
16.6
°C/W
0.7
16.6
4.2
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
7.5 Electrical Characteristics
over junction temperature range (0°C ≤ TJ ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT BIAS CURRENTS
ICC(SPLY)
ICC(SLP)
Active supply current, VCC
Sleep current (current into BAT
pin)
VVCC > VVCC(min)
VIN < V(BAT)
2.6 V ≤ VI(BAT) ≤ VO(BAT-REG),
Excludes load on OUT pin
1
2
mA
2
5
ICC(IN-STDBY)
Input standby current
ICC(BAT-STDBY)
BAT standby current
IIB(BAT)
Charge done current, BAT
OUT PIN-VOLTAGE REGULATION
VI(IN) ≤ 6V, Total current into IN pin with chip
disabled, Excludes all loads, CE=LOW, after
t(CE-HOLDOFF) delay
Total current into BAT pin with input present
and chip disabled;
Excludes all loads, CE=LOW,
after t(CE-HOLDOFF) delay,
0°C ≤ TJ ≤ 85°C(1)
Charge DONE, input supplying the load
200
μA
45
65
1
5
VO(OUT-REG)
Output regulation
voltage
bq24070
bq24071
VI(IN) ≥ 4.4 V + VDO
VI(IN) ≥ 6 V + VDO
OUT PIN – DPPM REGULATION
V(DPPM-SET)
DPPM set point(2)
VDPPM-SET < VOUT
I(DPPM-SET)
DPPM current source
Input present
SF
DPPM scale factor
V(DPPM-REG) = V(DPPM-SET) × SF
OUT PIN – FET (Q1, Q2) DROP-OUT VOLTAGE RDS(on))
V(INDO)
IN-to-OUT dropout voltage(3)
VI(IN) ≥ VCC(min), Mode = High,
II(IN) = 1 A, (IO(OUT)+ IO(BAT)), or no input
V(BATDO)
BAT-to-OUT dropout voltage
(discharging)
VI (BAT) ≥ 3 V, II(BAT)= 1.0 A, VCC < VI(BAT)
2.6
95
1.139
4.4
6.0
100
1.150
300
40
4.5
V
6.3
3.8
V
105
μA
1.162
475
mV
100
(1) This includes the quiescent current for the integrated LDO.
(2) V(DPPM-SET) is scaled up by the scale factor for controlling the output voltage V(DPPM-REG).
(3) VDO(max), dropout voltage is a function of the FET, RDS(on), and drain current. The dropout voltage increases proportionally to the
increase in current.
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