BQ24070_14 Datasheet, PDF (12/33 Pages) Texas Instruments – System Power-Path Management IC

bq24070, bq24071
SLUS694G – MARCH 2006 – REVISED DECEMBER 2014
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Feature Description (continued)
The DPPM voltage, V_(DPPM), is programmed as follows:
V_{(DPPM−REG) =} I_{(DPPM) ×} R_{(DPPM) ×} SF
where
• R_(DPPM) is the external resistor connected between the DPPM and VSS pins
• I_(DPPM) is the internal current source
• SF is the scale factor as specified in the specification table
(1)
The safety timer is dynamically adjusted while in DPPM mode. The voltage on the ISET1 pin is directly
proportional to the programmed charging current. When the programmed charging current is reduced, due to
DPPM, the ISET1 and TMR voltages are reduced and the timer clock is proportionally slowed, extending the
safety time. In normal operation V(TMR) = 2.5 V; and, when the clock is slowed, V(TMR) is reduced. When
V(TMR) = 1.25 V, the safety timer has a value close to 2 times the normal operation timer value. See Figure 10
through Figure 9.
8.3.1.2 Case 2: USB Mode (Mode = L)
8.3.1.2.1 System Power
In this case, the system load is powered from a USB port through the internal switch Q1 (see Figure 3). In this
case, Q1 regulates the total current to the 100-mA or 500-mA level, as selected on the ISET2 input. The output,
V_OUT, is regulated to 4.4 V (bq24070). The power management of the system is responsible for keeping its
system load below the USB current level selected (if the battery is critically low or missing). Otherwise, the output
drops to the battery voltage; therefore, the system should have a low-power mode for USB power application.
The DPPM feature keeps the output from dropping below its programmed threshold, due to the battery charging
current, by reducing the charging current.
8.3.1.2.2 Charge Control
When in USB mode, Q1 regulates the input current to the value selected by the ISET2 pin (0.1/0.5 A). The
charge current to the battery is set by the ISET1 resistor (typically > 0.5 A). Because the charge current typically
is programmed for more current than the USB current limit allows, the output voltage drops to the battery voltage
or DPPM voltage, whichever is higher. If the DPPM threshold is reached first, the charge current is reduced until
V_OUT stops dropping. If V_OUT drops to the battery voltage, the battery is able to supplement the input current to
the system.
8.3.1.2.3 Dynamic Power-Path Management (DPPM)
The theory of operation is the same as described in CASE 1, except that Q1 is restricted to the USB current level
selected by the ISET2 pin.
The DPPM voltage, V_(DPPM), is programmed as follows:
V_{(DPPM−REG) =} I_{(DPPM) ×} R_{(DPPM) ×} SF
where
• R_(DPPM) is the external resistor connected between the DPPM and VSS pins
• I_(DPPM) is the internal current source
• SF is the scale factor as specified in the specification table
(2)
8.3.1.2.4 Application Curve Descriptions
Refer to the applications section to view the curves. Figure 10 illustrates DPPM and battery supplement modes
as the output current (I_OUT) is increased; channel 1 (CH1) VIN (VAC) = 5.4 V; channel 2 (CH2) V_OUT; channel 3
(CH3) I_OUT = 0 to 2.2 A to 0 A; channel 4 (CH4) V_BAT = 3.5 V; I_(PGM-CHG) = 1 A. The output load is increased from
0 A to approximately 2.2 A and back to 0 A as shown in the bottom waveform. As the I_OUT load reaches 0.5 A,
along with the 1-A charge current, the adaptor starts to current limit, the output voltage drops to the DPPM-OUT
threshold of 4.26 V. This is DPPM mode. The IN input tracks the output voltage by the dropout voltage of the IN
FET. The battery charge current is then adjusted back as necessary to keep the output voltage from falling any
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