BQ24070_14 Datasheet, PDF (21/33 Pages) Texas Instruments – System Power-Path Management IC

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bq24070, bq24071
SLUS694G – MARCH 2006 – REVISED DECEMBER 2014
Typical Application (continued)
9.2.2 Detailed Design Procedure
The minimum required 0.1 μF capacitors are placed on IN and OUT. Additional 10-μF capacitors are included on
IN and OUT to improve load transient response. The recommended (but not required) 33-μF capacitor on BAT is
added to allow for operation when no battery is attached. A 0.22-μF capacitor is connected between BAT and
ISET1 to improve operation at low charge currents.
Rearranging Equation 4 gives R_SET = V_(SET) x K_(SET) / I_O(BAT) = 2.5 V x 425 / 1 A = 1062.5 Ω → 1070 Ω. Per
Equation 3, the precharge current is 100 mA and per Equation 8, the termination current is 100 mA. Since MODE
is high, in order to prevent the charge current from being reduced by 1/2, ISET2 is tied high.
Rearranging Equation 5 gives R_TMR = t_(CHG) / K_(TMR) gives 6 hrs x 60 min/hr x 60 s/min / 0.360 s/Ω = 60 kΩ →
60.4 kΩ
Rearranging Equation 1 gives R_DPPM = V_(DPPM-REG) / (I_(DPPM) x SF) = 4.26 V / ( 100 μA x 1.15) = 37.044 kΩ →37.4
kΩ. C_DPPM of 10 nF was added to prevent the IC from falsely entering short circuit protection at start-up.
Not shown are 1.5-kΩ resistors and LEDs pulled up to V(IN) from STAT1, STAT2, and PG.
9.2.2.1 Selecting the Input and Output Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor on the input. A 0.1-μF ceramic
capacitor placed in close proximity to the IN to VSS pins works well. In some applications, depending on the
power-supply characteristics and cable length, adding an additional 4.7-μF to 10-μF ceramic capacitor to the
input might be required.
The bq2407x requires only a small output capacitor for loop stability. A 0.1-μF ceramic capacitor placed between
the OUT and VSS pin is typically sufficient. TI recommends installing at least an additional 10-uF ceramic
capacitor between OUT and VSS in order to improve load transient response.
TI recommends installing a minimum 33-μF capacitor between the BAT pin and VSS (in parallel with the battery).
This configuration ensures proper hot-plug power up with a no-load condition (no system load or battery
attached).
V_REF output capacitor with a value of 0.1 μF is required. A 0.22-μF capacitor connected between BAT and ISET1
is recommended to improve operation at low charge currents.
This short-circuit disable feature was implemented mainly for power up when inserting a battery. Because the
BAT input voltage rises much faster than the OUT voltage (V_out<V_bat-200 mV), with most any capacitive load on
the output, the part can get stuck in short-circuit mode. Placing a 1-nF to 100-nF capacitor between the DPPM
pin and ground slows the V_DPPM rise time, during power up, and delays the short-circuit protection.
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