THS7353_15 Datasheet, PDF (42/57 Pages) Texas Instruments – 3-Channel Low Power Video Buffer with I2C Control, Selectable Filters, External Gain Control, 2:1 Input MUX, and Selectable Input Modes

THS7353
SLOS484B – NOVEMBER 2005 – REVISED AUGUST 2012
THS7353 Read Phase 2:
Step 7
0
I²C Start (Master)
S
www.ti.com
Step 8
I²C General Address (Master)
7
6
5
4
3
2
1
0
0
1
0
1
1
X
X
1
Where each X Logic state is defined by I²C-A1 and I²C-A0 pins being tied to either V_S+ or GND.
Step 9
9
I²C Acknowledge (Slave)
A
Step 10
I²C Read Data (Slave)
7
Data
6
Data
5
Data
4
Data
3
Data
2
Data
1
Data
0
Data
Where Data is determined by the Logic values contained in the Channel Register.
Step 11
9
I²C Not-Acknowledge (Master)
A
Step 12
0
I²C Stop (Master)
P
42
Copyright © 2005–2012, Texas Instruments Incorporated