THS7353_15 Datasheet, PDF (32/57 Pages) Texas Instruments – 3-Channel Low Power Video Buffer with I2C Control, Selectable Filters, External Gain Control, 2:1 Input MUX, and Selectable Input Modes

THS7353
SLOS484B – NOVEMBER 2005 – REVISED AUGUST 2012
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The I²C interface of the THS7353 allows each channel to be configured totally independent of the other
channels. One of the benefits is that a multiple output encoder (or DAC) can be routed through one THS7353
with the proper input configuration and low-pass filter required regardless of the signal. This is useful for a
portable system or in a low cost system where only one set (or two sets in parallel) is desired on the output of
the system. An update of the I²C commands changes the THS7353 channels. An example is shown in Figure 68
where the input MUX allows for one set of HDTV signals to be put into the THS7353, and then through an I²C
update, a SDTV set of signals is sent through the THS7353 with the proper input mode and low-pass filters.
3.3 V
Y’
R
P’_B
R
P’_R
DAC /
R
Encoder
S-Video
Y’
R
S-Video
C’
R
CBVS
R
DC + 250 mV
1 NC
NC ₂₀
2 CH.1 IN A CH.1 OUT 19
DC + 250 mV
DC + 250 mV
3 CH.2 IN A
4 CH.3 IN A
CH1.
GAIN ADJ
18
CH.2 OUT 17
DC + 250 mV
DC + 250 mV
5 CH.1 IN B
6 CH.2 IN B
CH2.
GAIN ADJ
16
CH.3 OUT 15
DC + 250 mV
CH3.
7 CH.3 IN B _{GAIN ADJ} 14
8 ^{I 2C-A1}
I2C-SCL 13
9 I 2C-A0
I2C-SDA ₁₂
10 GND
V_{S+ 11}
0.01 mF
Video
75 W ^{Out 1}
2.2 pF
750 W
2.2 pF
750 W
2.2 pF
750 W
Video
75 W ^{Out 2}
Video
75 W ^{Out 3}
3.3 V
+
33 mF
2
IC
Controller
75 W
75 W
75 W
Figure 68. Typical EDTV/HDTV and SDTV Encoder DAC Driving a Single THS7353
Although the circuit of Figure 68 conserves space and cost, the re-use of the output connections may not be the
best solution. For a complete system, the THS7353 can be used as an input buffer and the THS7313 (SLOS483)
and THS7303 (SLOS479) are used as output buffers as shown in Figure 69. The THS7313 is targeted for SDTV
signals and is limited to an 8-MHz filter. The THS7303 is a selectable SD/ED/HD line driver buffer. As the I²C
section discusses, it is easy to have both parts in one system as the I²C address of each part can be one of four
discrete addresses by the logic appearing on the I²C-A1 and I²C-A0 lines.
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