MSP430FR2111 Datasheet, PDF (40/75 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR2111, MSP430FR2110
SLASE78A – AUGUST 2016 – REVISED AUGUST 2016
www.ti.com
OPERATION MODE
MCLK
SMCLK
REFO
ACLK
RTC
Table 6-8. XTCLK Distribution
CLOCK SOURCE
SELECT BITS
SELMS
SELMS
SELREF
SELA
RTCSS
XTLFCLK
AM TO LPM3.5 (DC to 40 kHz)
10b
10b
0b
0b
10b
6.11.3 General-Purpose Input/Output Port (I/O)
Up to 12 I/O ports are implemented.
• P1 has 8 bits implemented, and P2 has 4 bits implemented.
• All individual I/O bits are independently programmable.
• Any combination of input, output, and interrupt conditions is possible to P1 and P2.
• Programmable pullup or pulldown on all ports.
• Edge-selectable interrupt, LPM4, LPM3.5 and LPM4.5 wake-up input capability is available for P1.0 to
P1.3, P2.0, P2.1, P2.6, and P2.7.
• Read and write access to port-control registers is supported by all instructions.
• Ports can be accessed byte-wise or word-wise in pairs.
• Capacitive Touch I/O functionality is supported on all pins.
NOTE
Configuration of digital I/Os after BOR reset
To prevent any cross currents during start-up of the device, all port pins are high-impedance
with Schmitt triggers and module functions disabled. To enable the I/O functions after a BOR
reset, the ports must be configured first and then the LOCKLPM5 bit must be cleared. For
details, see the Configuration After Reset section in the Digital I/O chapter of the
MSP430FR4xx and MSP430FR2xx Family User's Guide.
6.11.4 Watchdog Timer (WDT)
The primary function of the WDT module is to perform a controlled system restart after a software problem
occurs. If the selected time interval expires, a system reset is generated. If the watchdog function is not
needed in an application, the module can be configured as interval timer and can generate interrupts at
selected time intervals.
WDTSSEL
00
01
10
11
Table 6-9. WDT Clocks
NORMAL OPERATION
(WATCHDOG AND INTERVAL TIMER MODE)
SMCLK
ACLK
VLOCLK
Reserved
40
Detailed Description
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