TCA9555_16 Datasheet, PDF (4/46 Pages) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

TCA9555
SCPS200D – JULY 2009 – REVISED JULY 2016
6 Pin Configuration and Functions
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NAME
A0
A1
A2
GND
INT
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
P12
P13
P14
P15
P16
P17
SCL
SDA
V_CC
DB, PW Package
24-Pin TSSOP
Top View
RTW, RGE Package
24-Pin WQFN, VQFN with Exposed Thermal Pad
Top View
INT 1
A1 2
A2 3
P00 4
P01 5
P02 6
P03 7
P04 8
P05 9
P06 10
P07 11
GND 12
24 V_CC
23 SDA
22 SCL
21 A0
20 P17
19 P16
18 P15
17 P14
16 P13
15 P12
14 P11
13 P10
24 23 22 21 20 19
P00 ¹
P01 ²
P02 ³
P03 ⁴
P04 ⁵
P05 ⁶
Exposed
Center
Pad
18 _A0
17 _P17
16 P16
15 P15
14 P14
13 _P13
7 8 9 10 11 12
The exposed center pad, if used, must be
connected as a secondary ground or left
electrically open.
PIN
NO.
DB, PW
RTW,
RGE
21
18
2
23
3
24
12
9
1
22
4
1
5
2
6
3
7
4
8
5
9
6
10
7
11
8
13
10
14
11
15
12
16
13
17
14
18
15
19
16
20
17
22
19
23
20
24
21
Pin Functions
TYPE
DESCRIPTION
Input
Input
Input
GND
Output
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Input
Input
Supply
Address input 0. Connect directly to V_CC or ground
Address input 1. Connect directly to V_CC or ground
Address input 2. Connect directly to V_CC or ground
Ground
Interrupt output. Connect to V_CC through a pull-up resistor
P-port I/O. Push-pull design structure. At power on, P00 is configured as an input
P-port I/O. Push-pull design structure. At power on, P01 is configured as an input
P-port I/O. Push-pull design structure. At power on, P02 is configured as an input
P-port I/O. Push-pull design structure. At power on, P03 is configured as an input
P-port I/O. Push-pull design structure. At power on, P04 is configured as an input
P-port I/O. Push-pull design structure. At power on, P05 is configured as an input
P-port I/O. Push-pull design structure. At power on, P06 is configured as an input
P-port I/O. Push-pull design structure. At power on, P07 is configured as an input
P-port I/O. Push-pull design structure. At power on, P10 is configured as an input
P-port I/O. Push-pull design structure. At power on, P11 is configured as an input
P-port I/O. Push-pull design structure. At power on, P12 is configured as an input
P-port I/O. Push-pull design structure. At power on, P13 is configured as an input
P-port I/O. Push-pull design structure. At power on, P14 is configured as an input
P-port I/O. Push-pull design structure. At power on, P15 is configured as an input
P-port I/O. Push-pull design structure. At power on, P16 is configured as an input
P-port I/O. Push-pull design structure. At power on, P17 is configured as an input
Serial clock bus. Connect to V_CC through a pull-up resistor
Serial data bus. Connect to V_CC through a pull-up resistor
Supply voltage
4
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