TCA9555_16 Datasheet, PDF(31/46 Page) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

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TCA9555_16 Datasheet, PDF (31/46 Pages) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

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12 Layout

TCA9555

SCPS200D â JULY 2009 â REVISED JULY 2016

12.1 Layout Guidelines

For printed circuit board (PCB) layout of the TCA9555, common PCB layout practices must be followed, but

additional concerns related to high-speed data transfer such as matched impedances and differential pairs

are not a concern for I2C signal speeds.

In all PCB layouts, it is a best practice to avoid right angles in signal traces, to fan out signal traces away

from each other upon leaving the vicinity of an integrated circuit (IC), and to use thicker trace widths to carry

higher amounts of current that commonly pass through power and ground traces. By-pass and de-coupling

capacitors are commonly used to control the voltage on the VCC pin, using a larger capacitor to provide

additional power in the event of a short power supply glitch and a smaller capacitor to filter out high-

frequency ripple. These capacitors must be placed as close to the TCA9555 as possible. These best

practices are shown in the Layout Example.

For the layout example provided in the Layout Example, it is possible to fabricate a PCB with only 2 layers by

using the top layer for signal routing and the bottom layer as a split plane for power (VCC) and ground (GND).

However, a 4 layer board is preferable for boards with higher density signal routing. On a 4 layer PCB, it is

common to route signals on the top and bottom layer, dedicate one internal layer to a ground plane, and

dedicate the other internal layer to a power plane. In a board layout using planes or split planes for power

and ground, vias are placed directly next to the surface mount component pad which needs to attach to VCC,

or GND and the via is connected electrically to the internal layer or the other side of the board. Vias are also

used when a signal trace needs to be routed to the opposite side of the board, but this technique is not

demonstrated in the Layout Example.

12.2 Layout Example

0603

10k Pull-up

0603 Cap

A2 A1

P00

P01

P17

P02

P16

P03

P15

P04

P14

P05

P13

= Via to GND Plane

Figure 43. TCA9555 Layout Example

Product Folder Links: TCA9555

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