TCA9555_16 Datasheet, PDF (16/46 Pages) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

TCA9555
SCPS200D – JULY 2009 – REVISED JULY 2016
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Feature Description (continued)
9.3.2 Hardware Address Pins
The TCA9555 features 3 hardware address pins (A0, A1, and A2) to allow the user to program the device's I²C
address by pulling each pin to either V_CC or GND to signify the bit value in the address. This allows up to 8
TCA9555 to be on the same bus without address conflicts. See the Functional Block Diagram to see the 3 pins.
The voltage on the pins must not change while the device is powered up in order to prevent possible I²C glitches
as a result of the device address changing during a transmission. All of the pins must be tied either to V_CC or
GND and cannot be left floating.
9.3.3 Interrupt (INT) Output
An interrupt is generated by any rising or falling edge of the port inputs in the input mode. After time t_iv, the signal
INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original setting or
data is read from the port that generated the interrupt. Resetting occurs in the read mode at the acknowledge
(ACK) bit after the rising edge of the SCL signal. Note that the INT is reset at the ACK just before the byte of
changed data is sent. Interrupts that occur during the ACK clock pulse can be lost (or be very short) because of
the resetting of the interrupt during this pulse. Each change of the I/Os after resetting is detected and is
transmitted as INT.
Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output
cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur if the
state of the pin does not match the contents of the Input Port register. Because each 8-bit port is read
independently, the interrupt caused by port 0 is not cleared by a read of port 1, or vice versa.
INT has an open-drain structure and requires a pull-up resistor to V_CC (typically 10 kΩ in value).
9.4 Device Functional Modes
9.4.1 Power-On Reset (POR)
When power (from 0 V) is applied to V_CC, an internal power-on reset circuit holds the TCA9555 in a reset
condition until V_CC has reached V_POR. At that time, the reset condition is released, and the TCA9555 registers
and I²C-SMBus state machine initialize to their default states. After that, V_CC must be lowered to below V_PORF
and back up to the operating voltage for a power-reset cycle.
9.4.2 Powered-Up
When power has been applied to V_CC above V_POR, and the POR has taken place, the device is in a functioning
mode. In this state, the device is ready to accept any incoming I²C requests and is monitoring for changes on the
input ports.
9.5 Programming
9.5.1 I/O Port
When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high-impedance input. The input
voltage may be raised above V_CC to a maximum of 5.5 V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the Output Port register. In
this case, there are low-impedance paths between the I/O pin and either V_CC or GND. The external voltage
applied to this I/O pin must not exceed the recommended levels for proper operation. Figure 23 shows the
simplified schematic of P-Port I/Os.
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