TCA9555_16 Datasheet, PDF (19/46 Pages) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

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Programming (continued)
Table 1 shows the interface definition.
BYTE
I²C slave address
P0x I/O data bus
P1x I/O data bus
7 (MSB)
L
P07
P17
Table 1. Interface Definition
BIT
6
5
4
3
H
L
L
A2
P06
P05
P04
P03
P16
P15
P14
P13
TCA9555
SCPS200D – JULY 2009 – REVISED JULY 2016
2
1
0 (LSB)
A1
A0
R/W
P02
P01
P00
P12
P11
P10
9.5.2.1 Bus Transactions
Data is exchanged between the master and the TCA9555 through write and read commands, and this is
accomplished by reading from or writing to registers in the slave device.
Registers are locations in the memory of the slave which contain information, whether it be the configuration
information or some sampled data to send back to the master. The master must write information to these
registers in order to instruct the slave device to perform a task.
9.5.2.1.1 Writes
To write on the I²C bus, the master sends a START condition on the bus with the address of the slave, as well
as the last bit (the R/W bit) set to 0, which signifies a write. After the slave sends the acknowledge bit, the master
then sends the register address of the register to which it wishes to write. The slave acknowledges again, letting
the master know it is ready. After this, the master starts sending the register data to the slave until the master
has sent all the data necessary (which is sometimes only a single byte), and the master terminates the
transmission with a STOP condition.
See the Control Register and Command Byte section to see list of the TCA9555's internal registers and a
description of each one.
Figure 26 to Figure 28 show examples of writing a single byte to a slave register.
Master controls SDA line
Slave controls SDA line
Write to one register in a device
Device (Slave) Address (7 bits)
Register Address N (8 bits)
Data Byte to Register N (8 bits)
S 0 1 0 0 A2 A1 A0 0 A B7 B6 B5 B4 B3 B2 B1 B0 A D7 D6 D5 D4 D3 D2 D1 D0 A P
START
<br/>
R/W=0 ACK
ACK
Figure 26. Write to Register
ACK STOP
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