TCA9555_16 Datasheet, PDF (29/46 Pages) Texas Instruments – Low-Voltage 16-Bit I2C and SMBus I/O Expander with Interrupt Output and Configuration Registers

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11 Power Supply Recommendations
TCA9555
SCPS200D – JULY 2009 – REVISED JULY 2016
In the event of a glitch (data output or input or even power) or data corruption, the TCA9555 can be reset to its
default conditions by using the power-on reset feature. Power-on reset requires that the device go through a
power cycle to be completely reset. This reset also happens when the device is powered on for the first time in
an application.
The two types of power-on reset are shown in Figure 39 and Figure 40.
V_CC
Ramp-Up
Ramp-Down
Re-Ramp-Up
V_{CC_TRR_GND}
V_{CC_RT}
V_{CC_FT}
Time to Re-Ramp
V_{CC_RT}
Figure 39. V_CC is Lowered Below 0.2 V or 0 V and Then Ramped Up to V_CC
Time
V_CC
Ramp-Down
V_IN drops below POR levels
V_{CC_TRR_VPOR50}
Ramp-Up
V_{CC_FT}
Time to Re-Ramp
V_{CC_RT}
Figure 40. V_CC is Lowered Below the POR Threshold, Then Ramped Back Up to V_CC
Time
Table 9 specifies the performance of the power-on reset feature for TCA9555 for both types of power-on reset.
Table 9. RECOMMENDED SUPPLY SEQUENCING AND RAMP RATES⁽¹⁾
V_{CC_FT}
V_{CC_RT}
V_{CC_TRR_GND}
V_{CC_TRR_POR50}
V_{CC_GH}
V_{CC_MV}
V_{CC_GW}
PARAMETER
Fall rate of V_CC
Rise rate of V_CC
Time to re-ramp (when V_CC drops to GND)
Time to re-ramp (when V_CC drops to V_{POR_MIN} – 50 mV)
Level that V_CCP can glitch down to, but not cause a functional
disruption when V_{CC_GW}
The minimum voltage that V_CC can glitch down to without
causing a reset (V_{CC_GH} must also not be violated)
Glitch width that does not cause a functional disruption
See Figure 39
See Figure 39
See Figure 39
See Figure 40
See Figure 41
See Figure 41
See Figure 41
MIN TYP
0.1
0.1
1
1
1.5
(1) T_A = –40°C to +85°C (unless otherwise noted)
MAX
2000
2000
1.2
10
UNIT
ms
ms
μs
μs
V
V
μs
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