DS90C3202_13 Datasheet, PDF (4/26 Pages) Texas Instruments – 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver

DS90C3202
SNLS191D – APRIL 2005 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings ⁽¹⁾
Supply Voltage (V_DD)
LVCMOS/LVTTL Input Voltage
LVCMOS/LVTTL Output Voltage
LVDS Receiver Input Voltage
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Maximum Package Power Dissipation Capacity at 25°C
Package Derating
ESD Rating:
128 TQFP Package
HBM, 1.5kΩ, 100pF
EIAJ, 0Ω, 200pF
−0.3V to +4V
−0.3V to (V_DD + 0.3V)
−0.3V to (V_DD + 0.3V)
−0.3V to (V_DD + 0.3V)
+150°C
−65°C to +150°C
+260°C
1.4W
25.6mW/°C above +25°C
> 2 kV
> 200 V
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the device should be operated at these limits. The tables of “Electrical Characteristics” specify conditions for device operation.
Recommended Operating Conditions
Supply Voltage (V_DD)
Operating Free Air Temperature (T_A)
Supply Noise Voltage (V_P-P)
Receiver Input Range
Input Clock Frequency (f)
Min
3.15
0
0
8
Nom
3.3
+25
Max
3.6
+70
±100
V_DD
135
Unit
V
°C
mV_p-p
V
MHz
4
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