BQ24030-Q1 Datasheet, PDF (4/34 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC

bq24030-Q1
bq24031-Q1
SLUS793B – APRIL 2008 – REVISED OCTOBER 2009.................................................................................................................................................... www.ti.com
ELECTRICAL CHARACTERISTICS
over junction temperature range (0°C ≤ T_J ≤ 125°C) and recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
Input Bias Currents
I_CC(SPLY)
I_CC(SLP)
Active supply current, V_CC
Sleep current (current into
BAT pin)
V_VCC > V_VCC(min)
V_(AC) < V_(BAT), V_(USB) < V_(BAT),
2.6 V ≤ V_I(BAT) ≤ V_O(BAT-REG),
Excludes load on OUT pin
1
2
2
5
I_CC(AS-STDBY)
AC standby current
I_{CC(USB-STDBY)}
USB standby current
I_{CC(BAT-STDBY)}
BAT standby current
I_IB(BAT)
Charge done current, BAT
High AC Cutoff Mode
V_I(AC) ≤ 6 V, Total current into AC pin with chip disabled,
Excludes all loads, CE = low,
After t_(CE-HOLDOFF) delay
Total current into USB pin with chip disabled, Excludes
all loads, CE = low,
After t_(CE-HOLDOFF) delay
Total current into BAT pin with AC and/or USB present
and chip disabled, Excludes all loads (OUT and LDO),
CE = low, After t_(CE-HOLDOFF) delay, 0°C ≤ T_J ≤ 85°C⁽¹⁾
Charge finished, AC or USB supplying the load
200
200
45
60
1
5
V_CUT-OFF
Input AC cutoff voltage,
bq24035
V_I(AC) > 6.8 V, AC FET (Q1) turns off, USB FET (Q3)
turns on if USB power present, otherwise BAT FET (Q2)
turns on
6.1
6.4
6.8
LDO Output
V_O(LDO)
Output regulation voltage
Regulation accuracy⁽²⁾
Active only if AC or USB is present,
V_I(OUT) ≥ V_O(LDO) + (I_O(LDO) × R_DS(on))
3.3
–5
5
I_O(LDO)
Output current
20
R_DS(on)
On resistance
OUT to LDO
50
C_(OUT) ⁽³⁾
Output capacitance
1
OUT Pin – Voltage Regulation⁽⁴⁾
V_O(OUT-REG)
Output regulation voltage V_I(AC) ≥ 6 V + V_DO
OUT Pin – DPPM Regulation
V_(DPPM-SET)
DPPM set point⁽⁵⁾
V_DPPM-SET < V_OUT
I_(DPPM-SET)
DPPM current source
AC or USB present
SF
DPPM scale factor
V_(DPPM-REG) = V_(DPPM-SET) × SF
OUT Pin – FET (Q1, Q3, and Q2) Dropout Voltage (RDSon)
2.6
95
1.139
6.0
100
1.150
6.3
5
105
1.162
V_(ACDO)
V_(USBDO) ⁽⁷⁾
V_(BATDO)
AC to OUT dropout
voltage ⁽⁶⁾
USB to OUT dropout
voltage
BAT to OUT dropout
voltage (discharging)
V_I(AC) ≥ V_CC(min), PSEL = high, I_I(AC) = 1 A,
(I_O(OUT) + I_O(BAT)), or no AC
V_I(USB) ≥ V_CC(min), PSEL = low, ISET2 = high,
I_I(USB) = 0.4 A, (I_O(OUT) + I_O(BAT)), or no AC
V_I(USB) ≥ V_CC(min), PSEL = low, ISET2 = low,
I_I(USB) = 0.08 A, (I_O(OUT) + I_O(BAT))
V_I(BAT) ≥ 3 V, I_I(BAT)= 1 A, V_CC < V_I(BAT)
300
475
140
180
28
36
40
100
UNIT
mA
μA
μA
μA
μA
μA
V
V
%
mA
Ω
μF
V
V
μA
mV
mV
mV
(1) This includes the quiescent current for the integrated LDO.
(2) In standby mode (CE low) the accuracy is ±10%.
(3) LDO output capacitor is not required, but one with a value of 0.1 μF is recommended.
(4) When power is applied to the USB pin and PSEL is low, the USB input is switched straight through to the OUT pin (not regulated). This
voltage may drop to the DPPM-OUT threshold or battery voltage (which ever is higher) if the USB input current limit is active.
(5) V_(DPPM-SET) is scaled up by the scale factor for controlling the output voltage V_(DPPM-REG).
(6) V_DO(max), dropout voltage is a function of the FET, R_DS(on), and drain current. The dropout voltage increases proportionally to the
increase in current.
(7) R_DS(on) of USB FET Q3 is calculated by: (V_USB – V_OUT) / (I_OUT + I_BAT) when I_I(USB) ≤ I_I(USB-MIN) (FET fully on, not in regulation).
4
Submit Documentation Feedback
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): bq24030-Q1 bq24031-Q1