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BQ24030-Q1 Datasheet, PDF (22/34 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC
bq24030-Q1
bq24031-Q1
SLUS793B – APRIL 2008 – REVISED OCTOBER 2009.................................................................................................................................................... www.ti.com
V(SET−TREG)
+
I(OUT) R(SET)
K(SET)
(8)
All deglitch times also adjusted proportionally to t(CHG-TREG).
Charge Termination and Recharge
The bqTINY III series monitors the voltage on the ISET1 pin during voltage regulation to determine when
termination should occur (C/10 – 250 mV, C/25 – 100 mV). Once the termination threshold, I(TERM), is detected
the bqTINY III series terminates charge. The resistor connected between the ISET1 and VSS, RSET, programs
the fast charge current level (C level, VISET1 = 2.5 V) and, thus, the C/10 and C/25 current termination threshold
levels. The V(TERM) and K(SET) parameters are specified in the specifications table. Note that this applies to both
AC and USB charging.
I(TERM)
+
V(TERM) K(SET)
RSET
(9)
After charge termination, the bqTINY III series restarts the charge once the voltage on the OUT pin falls below
the V(RCH) threshold (VO(BAT-REG) – 100 mV, typical). This feature keeps the battery at full capacity at all times.
LDO Regulator
The bqTINY III series provides a 3.3-V LDO regulator. This regulator is typically used to power USB transceiver
or drivers in portable applications. Note that this LDO is only enabled when either AC or USB inputs are present.
If the CE pin is low (chip disabled) and AC or USB is present, the LDO is powered by the battery. This is to
ensure low input current when the chip is disabled.
Sleep and Standby Modes
The bqTINY III series charger circuitry enters the low-power sleep mode if both AC and USB are removed from
the circuit. This feature prevents draining the battery into the bqTINY III series during the absence of input
supplies. Note that in sleep mode, Q2 remains on (i.e., battery connected to the OUT pin) in order for the battery
to continue supplying power to the system.
The bqTINY III series enters the low-power standby mode if, while AC or USB is present, the CE input is low. In
this suspend mode, internal power FETs Q1 and Q3 (see Figure 4) are turned off, the BAT input is used to
power the system through OUT pin, and the LDO remains on (powered from output). This feature is designed to
limit the power drawn from the input supplies (such as USB suspend mode).
Charge Status Outputs
The open-drain (OD) STAT1 and STAT2 outputs indicate various charger operations as shown in Table 2. These
status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the
open-drain transistor is turned off. Note that this assumes CE = high.
Table 2. Status Pins Summary
CHARGE STATE
Precharge in progress
Fast charge in progress
Charge done
Charge suspend (temperature), timer fault, and sleep mode
STAT1
ON
ON
OFF
OFF
STAT2
ON
OFF
ON
OFF
ACPG, USBPG Outputs (Power Good)
The two open-drain pins, ACPG and USBPG (AC and USB power good), indicate when the AC adapter or USB
port is present and above the battery voltage. The corresponding output turns ON (low) when exiting sleep mode
(input voltage above battery voltage). This output is turned off in sleep mode (open drain). The ACPG and
USBPG pins can be used to drive an LED or communicate to the host processor. Note that OFF indicates the
open-drain transistor is turned off.
22
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