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BQ24030-Q1 Datasheet, PDF (19/34 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC
bq24030-Q1
bq24031-Q1
www.ti.com.................................................................................................................................................... SLUS793B – APRIL 2008 – REVISED OCTOBER 2009
Figure 13 illustrates USB boot-up and power-up via USB [channel 1 (CH1) V(USH) = 0 to 5 V, channel 2 (CH2)
USB input current (0.2 A/division), PSEL = low, CE = high, ISET2 = high, VBAT = 3.85 V, V(DPPM) = 3.0 V (V(DPPM)
× 1.15 < VBAT, otherwise DPPM mode increases time duration)]. When a USB source is applied (if AC is not
present), the CE pin and ISET2 pin are ignored during the boot-up time and a maximum input current of 100 mA
is made available to the OUT or BAT pins. After the boot-up time, the bqTINY III series implements the CE and
ISET2 pins as programmed.
VUSB
IUSB
Figure 13. USB Boot-Up and Power-Up
Battery Temperature Monitoring
The bqTINY™ III series continuously monitors battery temperature by measuring the voltage between the TS
and VSS pins. An internal current source (I(TS) = 100 μA, typical) provides the bias for most common 10-kΩ
negative-temperature coefficient thermistors (NTC) (see Figure 14). The device compares the voltage on the TS
pin against the internal V(LTF) and V(HTF) thresholds (0.5 V and 2.5 V (typ), respectively) to determine if charging
is allowed. Once a temperature outside the V(LTF) and V(HTF) thresholds is detected, the device immediately
suspends the charge. The device suspends charge by turning off the power FET and holding the timer value
(i.e., timers are not reset). Charge is resumed when the temperature returns to the normal range. The allowed
temperature range for 103AT-type thermistor is 0°C to 45°C. However, the user may increase the range by
adding two external resistors. See Figure 15.
bq2403x
PACK+
+
bq2403x
PACK+
+
LTF
HTF
VLTF
VHTF
ITS
PACK-
TS
9
NTC
BATTERY
PACK
LTF
HTF
VLTF
VHTF
ITS
TS
9
PACK-
RT1 TEMP
NTC
BATTERY
RT2
PACK
Figure 14. TS Pin Configuration
Figure 15. TS Pin Thresholds
Copyright © 2008–2009, Texas Instruments Incorporated
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