BQ24030-Q1 Datasheet, PDF (14/34 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC

bq24030-Q1
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SLUS793B – APRIL 2008 – REVISED OCTOBER 2009.................................................................................................................................................... www.ti.com
Case 2: USB (PSEL = Low)
System Power
In this case, the system load is powered directly from the USB port through the internal switch Q3 (see
Figure 14). Note in this case, Q3 regulates the total current to the 100-mA or 500-mA level, as selected on the
ISET2 input. Switch Q1 is turned off in this mode. If the system and battery load is less than the selected
regulated limit, then Q3 is fully on and V_OUT is approximately (V_(USB) – V_(USB-DO)). The systems power
management is responsible for keeping its system load below the USB current level selected (if the battery is
critically low or missing). Otherwise, the output drops to the battery voltage; therefore, the system should have a
low power mode for USB power application. The DPPM feature keeps the output from dropping below its
programmed threshold, due to the battery charging current, by reducing the charging current.
Charge Control
When USB is present and selected, Q3 regulates the input current to the value selected by the ISET2 pin
(0.1/0.5 A). The charge current to the battery is set by the ISET1 resistor (typically >0.5 A). Because the charge
current typically is programmed for more current than Q3 allows, the output voltage drops to the battery voltage
or DPPM voltage, whichever is higher. If the DPPM threshold is reached first, the charge current is reduced until
V_OUT stops dropping. If V_OUT drops to the battery voltage, the battery is able to supplement the input current to
the system.
Dynamic Power-Path Management (DPPM)
The theory of operation is the same as described in Case 1, except that Q3 restricts the amount of input current
delivered to the output and battery instead of the input supply.
Note that the DPPM voltage, V_(DPPM), is programmed as follows:
V_{(DPPM−REG)} + I_(DPPM) R_(DPPM) SF
(2)
and
V_{(DPPM−REG)} + V_{(DPPM−SET)} SF
(3)
where
R_(DPPM) is the external resistor connected between the DPPM and VSS pins.
I_(DPPM) is the internal current source.
SF is the scale factor as specified in the specification table.
Feature Plots
The voltage on the DPPM pin, V_(DPPM-SET) is determined by the external resistor, R_(DPPM). The output voltage
(V_(OUT)) that the DPPM function regulates is V_(DPPM-REG). For example, if R_(DPPM) is 33 kΩ, then the V_(DPPM-SET)
voltage on the DPPM pin is 3.3 V (I_(DPPM-SET) = 100 μA, typical). The DPPM function attempts to keep V_(OUT) from
dropping below the V_(DPPM-REG) voltage, and is 3.795 V for this example (SF = 1.15, typical).
Figure 5 illustrates DPPM and battery supplement modes as the output current (I_OUT) is increased, channel 1
(CH1) V_AC = 5.4 V, channel 2 (CH2) V_OUT, channel 3 (CH3) I_OUT = 0 to 2.2 A to 0 A, channel 4 (CH4)
V_BAT = 3.5 V, I_(PGM-CHG) = 1 A. In typical operation, V_OUT = 4.4 V_reg, through an AC adapter overload condition
and recovery. The AC input is set for ~5.1 V (1.5-A current limit), I_(CHG) = 1 A, V_(DPPM-SET) = 3.7 V,
V_(DPPM-OUT) = 1.15 × V_(DPPM-SET) = 4.26 V, V_BAT = 3.5 V, PSEL = H, and USB input is not connected. The output
load is increased from 0 A to ~2.2 A and back to 0 A as shown in the bottom waveform. As the I_OUT load reaches
0.5 A, along with the 1-A charge current, the adapter starts to current limit, the output voltage drops to the
DPPM-OUT threshold of 4.26 V. This is DPPM mode. The AC input tracks the output voltage by the dropout
voltage of the AC FET. The battery charge current is then adjusted back as necessary to keep the output voltage
from falling any further. Once the output load current exceeds the input current, the battery has to supplement
the excess current and the output voltage falls just below the battery voltage by the dropout voltage of the battery
FET. This is the battery supplement mode. When the output load current is reduced, the operation described is
reversed as shown. If V_(DPPM-REG) was set below the battery voltage, during input current limiting, the output falls
directly to the battery's voltage.
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