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| DS92LX1621_16 Datasheet, PDF (37/49 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel | |||
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DS92LX1621, DS92LX1622
www.ti.com
Figure 40 shows a typical connection of the DS92LX1622 Deserializer.
SNLS327I â MAY 2010 â REVISED JANUARY 2014
1.8V
C13 C11
FB1
FB2
FB3
DS92LX1622 (DES)
VDDIO
VDDD
C3
VDDIO1
C8
FB6 C12 C14
VDDR
C4
VDDIO2
C9
VDDSSCG
VDDIO3
C5
C10
FB4
C15 C6
Serial
Channel
Link III
Interface
FB5
C16 C7
C1
C2
LVCMOS
Control
Interface
TP_A
TP_B
VDDPLL
VDDCML
RIN+
RIN-
RES_PIN32
RES_PIN33
MODE
PDB
ROUT0
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
ROUT8
ROUT9
ROUT10
ROUT11
ROUT12
ROUT13
HSYNC
VSYNC
PCLK
VDDIO
RPU
RPU
I2C
Bus
Interface
SCL
FB7
SDA
FB8
C17
C18
Optional
NOTE:
Optional
C1 - C2 = 0.1 PF (50 WV)
C3 - C12 = 0.1 PF
C13 - C16 = 4.7 PF
C17 - C18 = >100 pF
RPU = 1 k: to 4.7 k:
RID (see ID[x] Resistor Value Table)
FB1 - FB8: Impedance = 1 k: (@ 100 MHz)
low DC resistance (<1:)
RES_PIN40
DAP (GND)
The "Optional" components shown are
provisions to provide higher system noise
immunity and will therefore result in higher
performance.
GPIO[0]
GPIO[1]
LOCK
PASS
ID[X]
1.8V
10 k:
RID
Figure 40. DS92LX1622 Typical Connection Diagram
LVCMOS
Parallel
Bus
GPIO
Control
Interface
Copyright © 2010â2014, Texas Instruments Incorporated
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Product Folder Links: DS92LX1621 DS92LX1622
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