DS92LX1621_16 Datasheet, PDF (2/49 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel

DS92LX1621, DS92LX1622
SNLS327I – MAY 2010 – REVISED JANUARY 2014
Typical Application Diagram
Image
Sensor
Parallel
Data In
16
2
Bi-
directional
Back Ch.
Cntl Bus
DS92LX1621
Channel Link III
Bi-direction
Back Channel
Parallel
Data Out
16
DS92LX1622
2
Bi-
directional
Back Ch.
Cntl Bus
Microcontroller/
ECU
Serializer
Deserializer
Figure 1. Typical Application Circuit
Block Diagrams
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16
D_IN[13:0] HS, VS
2
GPIO [1:0]
PCLK
PDB
M/S
PLL ^Clock
Gen
Timing
and
Control
R_T R_T DOUT+
RIN+ ^RT ^RT
DOUT-
RIN-
PDB
M/S
BISTEN
CDR
Clock
Gen
Timing
and
Control
16
R_OUT[13:0] HS, VS
2
GPIO [1:0]
PCLK
LOCK
PASS
SDA
SCL
CAD
SDA
SCL
CAD
DS92LX1621 - SERIALIZER
DS92LX1622 - DESERIALIZER
Figure 2. Block Diagram
Image
Sensor
Camera Data
14
YUV/RGB
HSYNC
VSYNC
Pixel Clock
DS92LX1621
Serializer
DIN[13:0]
HS, VS
PCLK
DS92LX1622
Channel Link III
Deserializer
High Speed
DOUT+
RIN+
DOUT-
RIN-
Bi-Directional
Back Channel
ROUT[13:0]
HS, VS
PCLK
Camera Data
14
YUV/RGB
HSYNC
VSYNC
Pixel Clock
ECU Module
Camera Unit
2
GPI/O
SDA
SCL
GPIO[1:0]
SDA
SCL
GPIO[1:0]
SDA
SCL
Figure 3. Application Block Diagram
2
GPI/O
SDA
SCL
Microcontroller
2
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