DS92LX1621_16 Datasheet, PDF (31/49 Pages) Texas Instruments – 10 - 50 MHz DC-Balanced Channel Link III Serializer and Deserializer with Bi-Directional Control Channel

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DS92LX1621, DS92LX1622
SNLS327I – MAY 2010 – REVISED JANUARY 2014
Camera A
DS92LX1621
CMOS
Image
Sensor
DATA
PCLK
FSYNC
I²C
DS92LX1622
DATA
PCLK
FSYNC
I²C
Serializer A
Camera B
DS92LX1621
CMOS
Image
Sensor
DATA
PCLK
FSYNC
I²C
Deserializer A
DS92LX1622
DATA
PCLK
ECU
Module
FSYNC
I²C
2C
Serializer B
Deserializer B
Figure 32. Synchronizing Multiple Cameras
DES A
GPIO[n] Input
DES B
GPIO[n] Input
SER A
GPIO[n] Output
SER B
GPIO[n] Output
t1
Figure 33. GPIO Delta Latency
GENERAL PURPOSE I/O (GPIO)
The DS92LX1621 / DS92LX1622 has up to 6 GPIO (2 dedicated and 4 programmable). GPIO[0] and GPIO[1]
are always available and GPIO[2:5] are available depending on the parallel data bus size. DIN/ROUT[0:3] can be
programmed into GPIOs (GPIO[2:5]) when the parallel data bus is less than 12 bits wide (10-bit data + HS,VS).
Each GPIO can be configured as either an input or output port. The GPIO maximum switching rate is up to 66
kHz when configured for communication between Deserializer GPI to Serializer GPO. Whereas data flow
configured for communication between Serializer GPI to Deserializer GPO is limited by the maximum data rate of
the PCLK.
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