OMAP-L138_16 Datasheet, PDF (36/286 Pages) Texas Instruments – OMAP-L138 C6000 DSP ARM Processor

OMAP-L138
SPRS586I – JUNE 2009 – REVISED SEPTEMBER 2014
www.ti.com
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
DDR_BA[2]
DDR_BA[1]
DDR_BA[0]
SIGNAL
NAME
DDR_DQGATE0
DDR_DQGATE1
DDR_ZP
DDR_VREF
DDR_DVDD18
Table 3-10. DDR2/mDDR Terminal Functions (continued)
NO.
W13
R10
T14
V11
U8
T9
V8
R11
R12
U12
R6
N6, N9, N10,
P7, P8, P9,
P10, R7, R8,
R9
TYPE ⁽¹⁾
O
O
I/O
I/O
O
O
O
O
I
O
I
PWR
PULL ⁽²⁾
DESCRIPTION
IPD
DDR2 data mask outputs
IPD
IPD
DDR2 data strobe inputs/outputs
IPD
IPD
IPD DDR2 SDRAM bank address
IPD
DDR2 loopback signal for external DQS gating.
IPD Route to DDR and back to DDR_DQGATE1 with
same constraints as used for DDR clock and data.
DDR2 loopback signal for external DQS gating.
IPD Route to DDR and back to DDR_DQGATE0 with
same constraints as used for DDR clock and data.
DDR2 reference output for drive strength calibration
— of N and P channel outputs. Tie to ground via 50
ohm resistor @ 5% tolerance.
DDR voltage input for the DDR2/mDDR I/O buffers.
— Note even in the case of mDDR an external resistor
divider connected to this pin is necessary.
— DDR PHY 1.8V power supply pins
36
Device Overview
Submit Documentation Feedback
Product Folder Links: OMAP-L138
Copyright © 2009–2014, Texas Instruments Incorporated