OMAP-L138_16 Datasheet, PDF (156/286 Pages) Texas Instruments – OMAP-L138 C6000 DSP ARM Processor

OMAP-L138
SPRS586I – JUNE 2009 – REVISED SEPTEMBER 2014
Table 6-55. Timing Requirements for McASP0 (1.0V)⁽¹⁾⁽²⁾
NO.
1 t_c(AHCLKRX)
2 t_w(AHCLKRX)
3 t_c(ACLKRX)
4 t_w(ACLKRX)
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
Cycle time, ACLKR/X
Pulse duration, ACLKR/W high or low
5
t_{su(AFSRX-ACLKRX)}
Setup time,
AFSR/X input to ACLKR/X⁽⁴⁾
6 t_{h(ACLKRX-AFSRX)}
Hold time,
AFSR/X input after ACLKR/X⁽⁴⁾
7 t_{su(AXR-ACLKRX)}
Setup time,
AXR0[n] input to ACLKR/X⁽⁴⁾⁽⁵⁾
8 t_{h(ACLKRX-AXR)}
Hold time,
AXR0[n] input after ACLKR/X⁽⁴⁾⁽⁵⁾
(1) ACLKX0 internal – McASP0 ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX0 external input – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX0 external output – McASP0 ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR0 internal – McASP0 ACLKRCTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR0 external input – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR0 external output – McASP0 ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2) P = SYSCLK2 period
(3) This timing is limited by the timing shown or 2P, whichever is greater.
(4) McASP0 ACLKXCTL.ASYNC=1: Receiver is clocked by its own ACLKR0
(5) McASP0 ACLKXCTL.ASYNC=0: Receiver is clocked by transmitter's ACLKX0
AHCLKR/X ext
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
AHCLKR/X int
AHCLKR/X ext
AHCLKR/X int
AHCLKR/X ext input
AHCLKR/X ext output
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1.0V
MIN
MAX
35
17.5
35 ⁽³⁾
17.5
16
5.5
5.5
-2
1
1
16
5.5
-2
5
5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
156 Peripheral Information and Electrical Specifications
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