BQ24735_17 Datasheet, PDF (36/46 Pages) Texas Instruments – 1- to 4-Cell Li+ Battery SMBus Charge Controller for Supporting Turbo Boost Mode With N-Channel Power MOSFET Selector

bq24735
SLUSAK9B – SEPTEMBER 2011 – REVISED APRIL 2015
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Layout Guidelines (continued)
To prevent unintentional charger shut down in normal operation, MOSFET R_DS(on) selection and PCB layout is
very important. Figure 23 shows a improvement PCB layout example and its equivalent circuit. In this layout, the
system current path and charger input current path is not separated, as a result, the system current causes
voltage drop in the PCB copper and is sensed by the IC. The worst layout is when a system current pull point is
after charger input; as a result all system current voltage drops are counted into overcurrent protection
comparator. The worst case for IC is when the total system current and charger input current sum equals the
DPM current. When the system pulls more current, the charger IC tries to regulate the R_AC current as a constant
current by reducing the charging current.
R _AC
System Path PCB Trace
System current
I _DPM
R _AC
R _PCB
I _SYS
I _CHRGIN
Charger input current
Charger Input PCB Trace
ACP
ACN
Charger
I _BAT
To ACP
To ACN
(a) PCB Layout
(b) Equivalent Circuit
Figure 23. Improvement PCB Layout Example
Figure 24 shows the optimized PCB layout example. The system current path and charge input current path is
separated, and as a result, the IC only senses charger input current caused PCB voltage drop and minimized the
possibility of unintentional charger shutdown in normal operation. This also makes PCB layout easier for high
system current application.
R _AC
System Path PCB Trace
System current
I _DPM
I _SYS
To ACP
To ACN
Single point connection at R_AC
Charger input current
Charger Input PCB Trace
(a) PCB Layout
R _AC
R _PCB
I _CHRGIN
ACP
ACN
Charger
I _BAT
(b) Equivalent Circuit
Figure 24. Optimized PCB Layout Example
The total voltage drop sensed by IC can be expressed as the following equation:
V_top = R_AC x I_DPM + R_PCB x (I_CHRGIN + (I_DPM - I_CHRGIN) x k) + R_DS(on) x I_PEAK
where
• R_AC is the AC adapter current sensing resistance.
• I_DPM is the DPM current set point.
• R_PCB is the PCB trace equivalent resistance.
• I_CHRGIN is the charger input current.
• k is the PCB factor.
• R_DS(on) is the high-side MOSFET turnon resistance.
• I_PEAK is the peak current of inductor.
(15)
Here, the PCB factor k = 0 means the best layout shown in Figure 24, where the PCB trace only goes through
charger input current, while k = 1 means the worst layout shown in Figure 23, where the PCB trace goes through
all the DPM current. The total voltage drop must below the high-side short-circuit protection threshold to prevent
unintentional charger shutdown in normal operation.
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