TLC34077 Datasheet, PDF (33/41 Pages) Texas Instruments – Video Interface Palette Data Manual

Appendix A
VCLK and the TMS340x0
While the TLC34077 VCLK output is designed for compatibility with all graphics systems, it is also tightly
coupled with the TMS340x0 graphics system processors. All the timing requirements of the TMS340x0 have
been considered. However, there are a few points that need to be explained with regard to applications.
VCLK
All the video control signals in the TMS340x0 (i.e., BLANK, HSYNC, and VSYNC) are triggered and
generated from the falling edge of VCLK. The fact that the TLC34076 uses the falling edge to sample and
latch the BLANK input gives users maximum freedom to choose the frequency of VCLK and interconnect
the TLC34077 with the TMS340x0 GSP without glue logic. Needless to say, the VCLK frequency needs to
be selected to be compatible with the minimum VCLK period required by the TMS340x0.
A-1