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THS10082_09 Datasheet, PDF (31/37 Pages) Texas Instruments – 10-BIT, TWO ANALOG INPUT, 8-MSPS, SIMULTANAEOUS SAMPLING
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THS10082
SLAS254B − MAY 2002 − REVISED NOVEMBER 2002
INTERFACING THE THS10082 TO THE TMS320C6201 DSP
The following application circuit shows an interface of the THS10082 to the TMS320C6201. The read (using RD,
RD-controlled) and write timings (using WR, WR-controlled) shown before are valid for this specific interface.
THS10082−1
TMS320C6201
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
THS10082−2
CE1
EA20
ARE
AWE
EXT_INT6
DATA
TOUT1
TOUT2
EA21
EXT_INT7
CS0
CS1
RD
WR
DATA_AV
DATA
CONV_CLK
ANALOG INPUT CONFIGURATION AND REFERENCE VOLTAGE
The THS10082 features two analog input channels. These can be configured for either single-ended or differential
operation. Best performance is achieved in differential mode. Figure 40 shows a simplified model, where a single-ended
configuration for channel AINP is selected. The reference voltages for the ADC itself are VREFP and VREFM (either internal
or external reference voltage). The analog input voltage range goes from VREFM to VREFP. This means that VREFM defines
the minimum voltage, which can be applied to the ADC. VREFP defines the maximum voltage, which can be applied to the
ADC. The internal reference source provides the voltage VREFM of 1.5 V and the voltage VREFP of 3.5 V. The resulting
analog input voltage swing of 2 V can be expressed by:
VREFM v AINP v VREFP
(1)
VREFP
AINP
10-Bit
ADC
VREFM
Figure 40. Single-Ended Input Stage
A differential operation is desired for many applications. Figure 41 shows a simplified model for the analog inputs AINM
and AINP, which are configured for differential operation. This configuration has a few advantages, which are discussed
in the following paragraphs.
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