DS90UB903Q Datasheet, PDF (31/41 Pages) Texas Instruments – 10 - 43MHz 18 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel

FIGURE 30. AT-SPEED BIST System Flow Diagram
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Step 1: Place the Deserializer in BIST Mode.
Serializer and Deserializer power supply must be supplied.
Enable the AT SPEED BIST mode on the Deserializer by set-
ting the BISTEN pin High. The 904 GPI[1:0] pins are used to
select the PCLK frequency of the on-chip oscillator for the
BIST test on high speed data path.
TABLE 5. BIST Oscillator Frequency Select
Des GPI
[1:0]
Oscillator
Source
min typ max
(MHz) (MHz) (MHz )
00 External PCLK 10
43
01 Internal
50
10 Internal
25
11 Internal
12.5
The Deserializer GPI[1:0] set to 00 will bypass the on-chip
oscillator and an external oscillator to Serializer PCLK input
is required. This allows the user to operate BIST under dif-
ferent frequencies other than the predefined ranges.
Step 2: Enable AT SPEED BIST by placing the Serializer into
BIST mode.
Deserializer will communicate through the bidirectional con-
trol channel to configure Serializer into BIST mode. Once the
BIST mode is set, the Serializer will initiate BIST transmission
to the Deserializer.
Wait 10 ms for Deserializer to acquire lock and then monitor
the LOCK pin transition from LOW to HIGH. At this point, AT
SPEED BIST is operational and the BIST process has begun.
The Serializer will start transfer of an internally generated
PRBS data pattern through the high speed serial link. This
pattern traverses across the interconnecting link to the De-
serializer. Check the status of the PASS pin; a HIGH indicates
a pass, a LOW indicates a fail. A fail will stay LOW for ½ a
clock cycle. If two or more bits in the serial frame fail, the
PASS pin will toggle ½ clock cycle HIGH and ½ clock cycle
low. The user can use the PASS pin to count the number of
fails on the high speed link. In addition, there is a defined SER
and DES register that will keep track of the accumulated error
count. The Serializer 903 GPO[0] pin will be assigned as a
PASS flag error indicator for the bidirectional control channel
link.
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