ADC32RF80_16 Datasheet, PDF (31/136 Pages) Texas Instruments – Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices

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ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
Feature Description (continued)
8.3.2 Clock Input
The ADC32RF8x sampling clock input includes internal 100-Ω differential termination along with on-chip biasing.
The clock input is recommended to be ac-coupled externally. The input bandwidth of the clock input is
approximately 3 GHz; the clock input impedance is shown with a 100-Ω reference impedance in the smith chart
of Figure 87.
Figure 87. SDD11 of the Clock Input
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