ADC32RF80_16 Datasheet, PDF (119/136 Pages) Texas Instruments – Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices

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9 Application and Implementation
ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Start-Up Sequence
The steps in Table 117 are recommended as the power-up sequence when the ADC32RF8x is in the decimation-
by-4 complex output mode.
STEP
1
2
3
4
5
6
6.1
7
7.1
8
Table 117. Initialization Sequence
DESCRIPTION
Supply all supply voltages. There is no required
power-supply sequence for the 1.15 V, 1.2 V,
and 1.9 V supplies, and can be supplied in any
order.
Provide the SYSREF signal.
Pulse a hardware reset (low-to-high-to-low) on
pins 33 and 34.
Write the register addresses described in the
PowerUpConfig file.
Write the register addresses mentioned in the
ILConfigNyqX_ChA file, where X is the Nyquist
zone.
Write the register addresses mentioned in the
ILConfigNyqX_ChB file, where X is the Nyquist
zone.
Wait for 50 ms for the device to estimate the
interleaving errors.
Depending upon the Nyquist band of operation,
choose and write the registers from the
appropriate file, NLConfigNyqX_ChA, where X
is the Nyquist zone.
Depending upon the Nyquist band of operation,
choose and write the registers from the
appropriate file, NLConfigNyqX_ChB, where X
is the Nyquist zone.
Configure the JESD interface and DDC block
by writing the registers mentioned in the DDC
Config file.
PAGE, REGISTER
ADDRESS AND DATA
—
—
—
See the files located in
SBAA226
See the files located in
SBAA226
See the files located in
SBAA226
—
See the files located in
SBAA226
See the files located in
SBAA226
See the files located in
SBAA226
COMMENT
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—
—
The Power-up config file contains analog
trim registers that are required for best
performance of the ADC. Write these
registers every time after power up.
Based on the signal band of interest, provide
the Nyquist zone information to the device.
This step optimizes device’ performance by
reducing interleaving mismatch errors.
—
Third-order nonlinearity of the device is
optimized by this step for channel A.
Third-order nonlinearity of the device is
optimized by this step for channel B.
Determine the DDC and JESD interface
LMFS options. Program these options in this
step.
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