SPNA135A Datasheet, PDF (3/15 Pages) Texas Instruments – Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x

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Device-Level Feature Differences
2 Device-Level Feature Differences
Table 1 summarizes the high-level feature differences between the superset microcontrollers of the LS20x
and LS31x series.
Table 1. High-Level Differences: TMS570LS20216 v/s TMS570LS3137
Feature
Technology Node
Maximum CPU Frequency
Maximum Frequency for
Single-Cycle Read from Flash
CPU Program Memory: Flash
Flash for Emulated EEPROM
CPU Data Memory: RAM
Nominal Supply Voltages
Memory Protection Unit
Code Security
Watchdog Timer
Dual-Clock Comparator (DCC)
External Memory Interface (EMIF)
Enhanced High-End Timer (NHET)
Multi-buffered ADC (MibADC)
Analog Input Channels Shared
Between Two ADCs
Interrupt-Capable General-Purpose
I/Os (GIO)
FlexRay Controller
Controller Area Network (CAN)
Interface Controllers
Local Interconnect Network (LIN)
Interface Controllers
Standard Serial Communication
Interface Controller
Multi-buffered Serial Peripheral
Interface (MibSPI) Controller
Standard Serial Peripheral Interface
(SPI) Controller
Inter-Integrated-Circuit (I2C)
Controller
Ethernet: Media Independent
Interface (MII)/
Reduced Media Independent
Interface (RMII)
TMS570LS20216
337 BGA
TMS570LS20216
144 QFP
F035, 130 nm
160 MHz
140 MHz
TMS570LS3137
337 BGA
TMS570LS3137
144 QFP
F021, 65 nm
180 MHz
160 MHz
36 MHz
45 MHz
2MB
3MB
Not Supported
64KB
128KB
256KB
3.3 V I/O, 3.3 V Flash Pump,
1.8 V Core, 3.3 V ADC
3.3 V I/O, 3.3 V Flash Pump, 1.2 V Core,
3.3 V or 5 V ADC
8 regions
12 regions
Not Supported
Advanced JTAG Security Module (AJSM)
Not Supported
Digital Windowed Watchdog
Not Supported
Two DCC Modules
Asynchronous Memories
only
Not Supported
Asynchronous
Memories and
Synchronous DRAM
(SDRAM)
Not Supported
Single NHET Module:
Single NHET
Two N2HET Modules:
32 channels
Module: 20 channels
44 channels
Two N2HET
Modules: 40
channels
Two 12-bit ADC Cores
with 24 Total Channels
Two 12-bit ADC
Cores with 20 Total
Channels
Two 12-bit ADC
Cores with 24 Total
Channels
Two 12-bit ADC
Cores with 24
Total Channels
8
8
16
16
16
8
2-channel
2-channel
3
2
2, compliant to LIN v2.0
2, compliant to LIN
v2.0
0
0
16
2-channel
3
1, compliant to LIN
v2.1
1
4
2-channel
3
1, compliant to
LIN v2.1
1
3
3
3
3
0
0
2
2
0
0
1
1
0
0
10/100 Mbps
10/100 Mbps
SPNA135A – October 2011
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Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x
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Copyright © 2011, Texas Instruments Incorporated