SPNA135A Datasheet, PDF (12/15 Pages) Texas Instruments – Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x

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5.3 Low-Power Oscillator and Clock Monitor (LPOCLKDET)
The low-power oscillator (LPO) provides two separate clock sources: LF LPO and HF LPO, to be used for
any given device clock domain. These form clock source numbers 4 and 5 for the global clock module
(GCM). The HF LPO is also used by the clock monitor circuit to detect the availability of the main oscillator
as well as provide a gross check on the frequency of the main oscillator. There are some basic differences
between the implementations of the LPOCLKDET macro between the LS20x/10x and LS31x/21x
microcontrollers. These do not affect the application software or hardware development.
• The LPO on LS20x/10x only requires the core supply (1.5 V nominal) for operation; the LPO on
LS31x/21x requires both the core supply (1.2 V nominal) and the I/O supply (3.3 V nominal) for
operation.
• The maximum cold start-up time for the LPO on LS20x/10x is 500 µs; this time is 900 µs on
LS31x/21x.
• The untrimmed HF LPO frequency ranges from 6.6 MHz to 17.4 MHz on LS20x/10x; this range is 5.5
MHz to 19.5 MHz on LS31x/21x.
• The untrimmed LF LPO frequency ranges from 55 kHz to 145 kHz on LS20x/10x; this range is 19 kHz
to 270 kHz on LS31x/21x.
• There are 16 HF LPO and LF LPO trim settings available on LS20x/10x; there are 32 trim settings on
LS31x/21x.
• Each trim setting affects the frequency by 6.25% on LS20x/10x; this value is 4% on LS31x/21x.
5.4 Oscillator
The oscillator on LS31x/21x is improved versus the oscillator on LS20x/10x in terms of noise immunity.
This has no impact on the application software development. The application hardware designed for
LS20x/10x can be reused with the LS31x/21x with the oscillator changed to be able to handle 3.3 V
CMOS levels. The following changes lead to the improvement in noise immunity:
• Oscillator buffer is a 3.3 V buffer on LS31x/21x versus 1.5 V on LS20x/10x
• An RC-filter is added on the oscillator input signal path to eliminate high-frequency noise
5.5 I/O Buffers
The I/O buffers on LS31x/21x are designed to be compatible to those on LS20x/10x in terms of the output
rise/fall times, input and output signal transition levels, input hysterisis levels, input clamp current, input
leakage current, pull up/down currents, as well as the ESD characteristics. There are other significant
improvements made to the I/O buffers on the LS31x/21x microcontrollers. These are:
• Adaptive impedance-controlled output mode allows the core noise to be decoupled from the I/O pad
• Available pull up/down when power-on reset is active; the pulls are disabled when power-on reset is
asserted on LS20x/10x
• RC-filter on the input signal path to eliminate high-frequency noise
5.6 Internal Voltage Monitor (VMON)
The internal voltage monitoring thresholds for the core supply are different to account for the reduced core
supply range. To identify the actual difference in the values of the voltage monitoring thresholds, see the
device-specific datasheet.
5.7 Glitch Filters
There are glitch filters implemented on the power-on reset (PORRST), warm reset (RST) and test reset
(TRST) signals on both the LS31x/21x as well as the LS20x/10x microcontrollers. The glitch filtering
capability is significantly different as shown in Table 3.
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Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x
Copyright © 2011, Texas Instruments Incorporated
SPNA135A – October 2011
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