SPNA135A Datasheet, PDF (13/15 Pages) Texas Instruments – Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x

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Parameter
PORRST low-pulse-width glitch filter
RST low-pulse-width glitch filter
TRST low-pulse-width glitch filter
Table 3. Glitch Filter Differences
LS20x/10x
MIN
MAX
30 ns
150 ns
30 ns
150 ns
30 ns
150 ns
Analog IP Differences
LS31x/21x
MIN
MAX
500 ns
2 µs
500 ns
2 µs
500 ns
2 µs
Input with a low pulse-width smaller than the minimum value specified will not pass through the glitch filter.
Input with a low pulse-width larger than the maximum value specified will definitely pass through the glitch
filter.
The application designer must ensure that any reset provided to the LS31x/21x microcontroller asserts the
reset (PORRST, RST, TRST) signal for at least the duration specified by the max value of the glitch filter
width, that is, 2 µs.
5.8 Analog-to-Digital Converter (ADC)
The main enhancements on the ADC macro on LS31x/21x microcontrollers are:
• Configurable 10-bit or 12-bit modes of operation
• Operating voltage range from 3.0 V to 5.25 V
• Minimum sample time reduced from 1µs to 200 ns
• Maximum ADC input switch on-resistance reduced from 1500Ω to 250Ω
• Maximum ADC sample switch on-resistance reduced from 1500Ω to 250Ω
• Maximum ADC sample capacitance increased from 8 pF to 12 pF
The ADC module on the LS31x/21x is configured to be in the 10-bit conversion mode by default. In order
to switch the ADC to be in the 12-bit conversion mode (as on LS20x/10x), the application must set the
10/12-BIT field of the ADC Operating Mode Control Register (ADOPMODECR, bit 31). For further details,
see the device-specific technical reference manual.
SPNA135A – October 2011
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Compatibility Considerations: TMS570LS20x/10x to TMS570LS31x/21x
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Copyright © 2011, Texas Instruments Incorporated