SN74AUP1G79_17 Datasheet, PDF (3/45 Pages) Texas Instruments – SN74AUP1G79 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

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5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
D
1
5
V_CC
CLK
2
GND
3
4
Q
DRL Package
5-Pin SOT-5X3
Top View
D1
CLK 2
GND 3
5 V_CC
4Q
DRY Package
6-Pin SON
Top View
D¹
CLK ²
GND ³
6V
CC
5 _NC
4Q
NAME
CLK
D
GND
NC
Q
V_CC
YFP Package
6-Pin DSBGA
Bottom View
1
2
C _{GND Q}
B _{CLK N.C.}
A
D
VCC
Not to scale
DBV, DCK,
DRL, DPW
2
1
3
—
4
5
PIN
DRY,
DSF
2
1
3
5
4
6
Pin Functions
YZP
YFP
B1
B1
A1
A1
C1
C1
—
B2
C2
C2
A2
A2
SN74AUP1G79
SCES592I – JULY 2004 – REVISED SEPTEMBER 2017
DCK Package
5-Pin SC70
Top View
D
1
5
V_CC
CLK
2
GND
3
4Q
DPW Package
5-Pin X2SON
Top View
D
GND
V_CC
CLK
Q
DSF Package
6-Pin SON
Top View
D¹
CLK ²
GND ³
6V
CC
5 _NC
4_Q
YZP Package
5-Pin DSBGA
Bottom View
1
2
C _{GND Q}
B _CLK
A
D
VCC
Not to scale
I/O
DESCRIPTION
I
Positive-Edge-Triggered Clock input
I
Data Input
—
Ground pin
—
No Connect
O
Q output
—
Positive supply
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