English
Language : 

SN74AUP1G79_17 Datasheet, PDF (19/45 Pages) Texas Instruments – SN74AUP1G79 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
www.ti.com
SN74AUP1G79
SCES592I – JULY 2004 – REVISED SEPTEMBER 2017
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions table. A 0.1-µF bypass capacitor is recommended to be connected from
the VCC terminal to GND to prevent power disturbance. To reject different frequencies of noise, use multiple
bypass capacitors in parallel. Capacitors with values of 0.1 µF and 1 µF are commonly used in parallel. The
bypass capacitor must be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Even low data rate digital signals can contain high-frequency signal components due to fast edge rates. When a
printed-circuit board (PCB) trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs
primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414
times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance
and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore
some traces must turn corners. Figure 11 shows progressively better techniques of rounding corners. Only the
last example (BEST) maintains constant trace width and minimizes reflections.
An example layout is given in Figure 12 for the DPW (X2SON-5) package. This example layout includes a 0402
(metric) capacitor and uses the measurements found in the example board layout appended to this end of this
datasheet. A via of diameter 0.1 mm (3.973 mil) is placed directly in the center of the device. This via can be
used to trace out the center pin connection through another board layer, or it can be left out of the layout
11.2 Layout Example
WORST
BETTER
BEST
2W
1W min.
W
Figure 11. Trace Example
0402
0.1 …F
Bypass Capacitor
8 mil
8 mil
8 mil
SOLDER MASK
OPENING, TYP
METAL UNDER
SOLDER MASK, TYP
Figure 12. Example Layout With DPW (X2SON-5) Package
Copyright © 2004–2017, Texas Instruments Incorporated
Product Folder Links: SN74AUP1G79
Submit Documentation Feedback
19